// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
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#include <asm/cacheflush.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/iopoll.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#ifdef CONFIG_OF
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#include <linux/of.h>
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#endif
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#include "sfc.h"
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#include "rkflash_api.h"
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#include "rkflash_blk.h"
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#define RKSFC_VERSION_AND_DATE "rksfc_base v1.1 2016-01-08"
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#define RKSFC_CLK_MAX_RATE (150 * 1000 * 1000)
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#define RKSFC_DLL_THRESHOLD_RATE (50 * 1000 * 1000)
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struct rksfc_info {
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void __iomem *reg_base;
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int irq;
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int clk_rate;
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struct clk *clk; /* sfc clk*/
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struct clk *ahb_clk; /* ahb clk gate*/
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u16 dll_cells;
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};
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static struct rksfc_info g_sfc_info;
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static struct device *g_sfc_dev;
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static struct completion sfc_irq_complete;
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unsigned long rksfc_dma_map_single(unsigned long ptr, int size, int dir)
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{
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return dma_map_single(g_sfc_dev, (void *)ptr, size
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, dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
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}
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void rksfc_dma_unmap_single(unsigned long ptr, int size, int dir)
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{
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dma_unmap_single(g_sfc_dev, (dma_addr_t)ptr, size
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, dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
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}
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static irqreturn_t rksfc_interrupt(int irq, void *dev_id)
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{
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sfc_clean_irq();
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complete(&sfc_irq_complete);
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return IRQ_HANDLED;
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}
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void rksfc_irq_flag_init(void)
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{
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init_completion(&sfc_irq_complete);
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}
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void rksfc_wait_for_irq_completed(void)
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{
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wait_for_completion_timeout(&sfc_irq_complete,
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msecs_to_jiffies(10));
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}
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static int rksfc_irq_config(int mode, void *pfun)
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{
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int ret = 0;
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int irq = g_sfc_info.irq;
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if (mode)
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ret = request_irq(irq, pfun, 0, "rksfc",
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g_sfc_info.reg_base);
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else
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free_irq(irq, NULL);
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return ret;
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}
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static int rksfc_irq_init(void)
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{
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init_completion(&sfc_irq_complete);
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rksfc_irq_config(1, rksfc_interrupt);
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return 0;
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}
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static int rksfc_irq_deinit(void)
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{
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rksfc_irq_config(0, rksfc_interrupt);
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return 0;
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}
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static void rksfc_delay_lines_tuning(void)
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{
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u8 id[3], id_temp[3];
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struct rk_sfc_op op;
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u16 cell_max = (u16)sfc_get_max_dll_cells();
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u16 right, left = 0;
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u16 step = SFC_DLL_TRANING_STEP;
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bool dll_valid = false;
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op.sfcmd.d32 = 0;
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op.sfcmd.b.cmd = 0x9F;
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op.sfctrl.d32 = 0;
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clk_set_rate(g_sfc_info.clk, RKSFC_DLL_THRESHOLD_RATE);
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sfc_request(&op, 0, id, 3);
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if ((0xFF == id[0] && 0xFF == id[1]) ||
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(0x00 == id[0] && 0x00 == id[1])) {
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dev_dbg(g_sfc_dev, "no dev, dll by pass\n");
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clk_set_rate(g_sfc_info.clk, g_sfc_info.clk_rate);
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return;
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}
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clk_set_rate(g_sfc_info.clk, g_sfc_info.clk_rate);
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for (right = 0; right <= cell_max; right += step) {
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int ret;
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sfc_set_delay_lines(right);
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sfc_request(&op, 0, id_temp, 3);
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dev_dbg(g_sfc_dev, "dll read flash id:%x %x %x\n",
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id_temp[0], id_temp[1], id_temp[2]);
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ret = memcmp(&id, &id_temp, 3);
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if (dll_valid && ret) {
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right -= step;
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break;
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}
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if (!dll_valid && !ret)
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left = right;
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if (!ret)
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dll_valid = true;
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/* Add cell_max to loop */
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if (right == cell_max)
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break;
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if (right + step > cell_max)
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right = cell_max - step;
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}
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if (dll_valid && (right - left) >= SFC_DLL_TRANING_VALID_WINDOW) {
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if (left == 0 && right < cell_max)
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g_sfc_info.dll_cells = left + (right - left) * 2 / 5;
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else
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g_sfc_info.dll_cells = left + (right - left) / 2;
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} else {
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g_sfc_info.dll_cells = 0;
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}
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if (g_sfc_info.dll_cells) {
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dev_dbg(g_sfc_dev, "%d %d %d dll training success in %dMHz max_cells=%u sfc_ver=%d\n",
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left, right, g_sfc_info.dll_cells, g_sfc_info.clk_rate,
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sfc_get_max_dll_cells(), sfc_get_version());
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sfc_set_delay_lines((u16)g_sfc_info.dll_cells);
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} else {
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dev_err(g_sfc_dev, "%d %d dll training failed in %dMHz, reduce the frequency\n",
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left, right, g_sfc_info.clk_rate);
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sfc_set_delay_lines(0);
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clk_set_rate(g_sfc_info.clk, RKSFC_DLL_THRESHOLD_RATE);
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g_sfc_info.clk_rate = clk_get_rate(g_sfc_info.clk);
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}
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}
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static int rksfc_probe(struct platform_device *pdev)
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{
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int irq;
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struct resource *mem;
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void __iomem *membase;
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int dev_result = -1;
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#ifdef CONFIG_ROCKCHIP_THUNDER_BOOT
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u32 status;
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#endif
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g_sfc_dev = &pdev->dev;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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membase = devm_ioremap_resource(&pdev->dev, mem);
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if (!membase) {
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dev_err(&pdev->dev, "no reg resource?\n");
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return -1;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(&pdev->dev, "no irq resource?\n");
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return irq;
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}
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g_sfc_info.irq = irq;
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g_sfc_info.reg_base = membase;
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g_sfc_info.ahb_clk = devm_clk_get(&pdev->dev, "hclk_sfc");
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g_sfc_info.clk = devm_clk_get(&pdev->dev, "clk_sfc");
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if (unlikely(IS_ERR(g_sfc_info.clk)) ||
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unlikely(IS_ERR(g_sfc_info.ahb_clk))) {
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dev_err(&pdev->dev, "%s get clk error\n", __func__);
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return -1;
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}
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clk_prepare_enable(g_sfc_info.ahb_clk);
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g_sfc_info.clk_rate = clk_get_rate(g_sfc_info.clk);
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if (g_sfc_info.clk_rate > RKSFC_CLK_MAX_RATE) {
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clk_set_rate(g_sfc_info.clk, RKSFC_CLK_MAX_RATE);
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g_sfc_info.clk_rate = clk_get_rate(g_sfc_info.clk);
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}
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clk_prepare_enable(g_sfc_info.clk);
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dev_info(&pdev->dev,
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"%s clk rate = %d\n",
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__func__,
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g_sfc_info.clk_rate);
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rksfc_irq_init();
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#ifdef CONFIG_ROCKCHIP_THUNDER_BOOT
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if (readl_poll_timeout(membase + SFC_SR, status,
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!(status & SFC_BUSY), 10,
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500 * USEC_PER_MSEC))
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dev_err(g_sfc_dev, "Wait for SFC idle timeout!\n");
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#endif
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sfc_init(g_sfc_info.reg_base);
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if (sfc_get_version() >= SFC_VER_4 && g_sfc_info.clk_rate > RKSFC_DLL_THRESHOLD_RATE)
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rksfc_delay_lines_tuning();
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else if (sfc_get_version() >= SFC_VER_4)
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sfc_set_delay_lines(0);
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#ifdef CONFIG_RK_SFC_NOR
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dev_result = rkflash_dev_init(g_sfc_info.reg_base, FLASH_TYPE_SFC_NOR, &sfc_nor_ops);
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#endif
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#ifdef CONFIG_RK_SFC_NAND
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if (dev_result)
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dev_result = rkflash_dev_init(g_sfc_info.reg_base, FLASH_TYPE_SFC_NAND, &sfc_nand_ops);
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#endif
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if (dev_result)
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return dev_result;
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return dma_set_mask(g_sfc_dev, DMA_BIT_MASK(32));
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}
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static int __maybe_unused rksfc_suspend(struct device *dev)
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{
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return rkflash_dev_suspend();
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}
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static int __maybe_unused rksfc_resume(struct device *dev)
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{
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if (g_sfc_info.dll_cells)
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sfc_set_delay_lines(g_sfc_info.dll_cells);
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return rkflash_dev_resume(g_sfc_info.reg_base);
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}
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static SIMPLE_DEV_PM_OPS(rksfc_pmops,
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rksfc_suspend,
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rksfc_resume);
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static void rksfc_shutdown(struct platform_device *pdev)
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{
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rkflash_dev_shutdown();
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}
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#ifdef CONFIG_OF
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static const struct of_device_id of_rksfc_match[] = {
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{.compatible = "rockchip,sfc"},
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{}
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};
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#endif
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static struct platform_driver rksfc_driver = {
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.probe = rksfc_probe,
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.shutdown = rksfc_shutdown,
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.driver = {
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.name = "rksfc",
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#ifdef CONFIG_OF
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.of_match_table = of_rksfc_match,
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#endif
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.pm = &rksfc_pmops,
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},
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};
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static void __exit rksfc_driver_exit(void)
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{
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rkflash_dev_exit();
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rksfc_irq_deinit();
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platform_driver_unregister(&rksfc_driver);
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}
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static int __init rksfc_driver_init(void)
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{
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int ret = 0;
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pr_err("%s\n", RKSFC_VERSION_AND_DATE);
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ret = platform_driver_register(&rksfc_driver);
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return ret;
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}
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module_init(rksfc_driver_init);
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module_exit(rksfc_driver_exit);
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MODULE_ALIAS("rksfc");
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