/******************************************************************************
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*
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* Copyright(c) 2007 - 2020 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#include "halbb_precomp.h"
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#ifdef HALBB_PSD_SUPPORT
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static const u8 psd_result_cali_tone_8821[7] = {21, 28, 33, 93, 98, 105, 127};
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static const u8 psd_result_cali_val_8821[7] = {67, 69, 71, 72, 71, 69, 67};
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void halbb_psd_igi_lv(struct bb_info *bb, enum igi_lv_sel igi_lv)
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{
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struct bb_psd_info *psd = &bb->bb_cmn_hooker->bb_psd_i;
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if (igi_lv == IGI_DEFAULT) {
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psd->igi_pin = 28;
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halbb_set_reg(bb, 0x1590, 0x7000, psd->lna_bkp);
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halbb_set_reg(bb, 0x1650, 0x7000, psd->lna_bkp_b);
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halbb_set_reg(bb, 0x1598, BIT(20), psd->tia_bkp);
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halbb_set_reg(bb, 0x1658, BIT(20), psd->tia_bkp_b);
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halbb_set_reg(bb, 0x1580, 0x3e0, psd->rxbb_bkp);
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halbb_set_reg(bb, 0x1640, 0x3e0, psd->rxbb_bkp_b);
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} else if (igi_lv == IGI_LEVEL1) {/*@ target Pin=-72dBm*/
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psd->igi_pin = 28;
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halbb_set_reg(bb, 0x1590, 0x7000, 0x6);
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halbb_set_reg(bb, 0x1650, 0x7000, 0x6);
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halbb_set_reg(bb, 0x1598, BIT(20), 0x1);
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halbb_set_reg(bb, 0x1658, BIT(20), 0x1);
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halbb_set_reg(bb, 0x1580, 0x3e0, 0x1f);
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halbb_set_reg(bb, 0x1640, 0x3e0, 0x1f);
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} else if (igi_lv == IGI_LEVEL2) {/*@ target Pin=-50dBm*/
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psd->igi_pin = 50;
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halbb_set_reg(bb, 0x1590, 0x7000, 0x6);
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halbb_set_reg(bb, 0x1650, 0x7000, 0x6);
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halbb_set_reg(bb, 0x1598, BIT(20), 0x1);
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halbb_set_reg(bb, 0x1658, BIT(20), 0x1);
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halbb_set_reg(bb, 0x1580, 0x3e0, 0x9);
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halbb_set_reg(bb, 0x1640, 0x3e0, 0x9);
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} else if (igi_lv == IGI_LEVEL3) {/*@ target Pin=-35dBm*/
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psd->igi_pin = 65;
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halbb_set_reg(bb, 0x1590, 0x7000, 0x6);
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halbb_set_reg(bb, 0x1650, 0x7000, 0x6);
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halbb_set_reg(bb, 0x1598, BIT(20), 0x0);
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halbb_set_reg(bb, 0x1658, BIT(20), 0x0);
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halbb_set_reg(bb, 0x1580, 0x3e0, 0x0);
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halbb_set_reg(bb, 0x1640, 0x3e0, 0x0);
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} else if (igi_lv == IGI_LEVEL4) {/*@ target Pin=0dBm*/
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psd->igi_pin = 100;
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halbb_set_reg(bb, 0x1590, 0x7000, 0x0);
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halbb_set_reg(bb, 0x1650, 0x7000, 0x0);
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halbb_set_reg(bb, 0x1598, BIT(20), 0x0);
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halbb_set_reg(bb, 0x1658, BIT(20), 0x0);
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halbb_set_reg(bb, 0x1580, 0x3e0, 0x8);
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halbb_set_reg(bb, 0x1640, 0x3e0, 0x8);
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}
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}
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u32 halbb_get_psd_data(struct bb_info *bb, u32 psd_tone_idx, u32 igi_pin)
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{
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struct bb_psd_info *psd = &bb->bb_cmn_hooker->bb_psd_i;
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struct bb_psd_cr_info *cr = &psd->bb_psd_cr_i;
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u8 i = 0;
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u8 j = 0;
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u32 psd_report = 0;
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bool psd_rdy = false;
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halbb_set_reg(bb, cr->fft_idx, cr->fft_idx_m, psd_tone_idx & 0x3ff);
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/*PSD trigger start*/
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halbb_set_reg(bb, cr->psd_en, cr->psd_en_m, 1);
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halbb_delay_us(bb, 10 << (psd->fft_point >> 7));
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/*Get PSD Report*/
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do { /*Polling time always use 100ms, when it exceed 2s, break loop*/
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psd_rdy = (u8)halbb_get_reg(bb, psd->psd_report_reg, BIT(25));
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if (!psd_rdy) {
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halbb_delay_us(bb, 100);
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i++;
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continue;
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} else {
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/*BB_DBG(bb, DBG_DBG_API, "psd_rdy = %d\n", psd_rdy);*/
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psd_report = halbb_get_reg(bb, psd->psd_report_reg,
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0x1ffffff);
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/*psd_report = psd_report >> 22;*/
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psd_report = halbb_convert_to_db((u64)psd_report) +
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igi_pin;
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break;
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}
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psd_report = 0;
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} while (i < 20);
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/*PSD trigger stop*/
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halbb_set_reg(bb, psd->psd_reg, BIT(22), 0);
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do { /*Polling time always use 100ms, when it exceed 2s, break loop*/
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psd_rdy = (u8)halbb_get_reg(bb, psd->psd_report_reg, BIT(25));
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if (psd_rdy) {
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/*BB_TRACE("psd_rdy2 = %d, wait %d * 100us for release \n", psd_rdy, (j + 1));*/
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halbb_delay_us(bb, 100);
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j++;
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continue;
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} else {
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break;
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}
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} while (j < 20);
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return psd_report;
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}
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void halbb_psd_para_setting(struct bb_info *bb, u8 sw_avg_time, u8 hw_avg_time,
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u8 i_q_setting, u16 fft_point, u8 path,
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u8 psd_input, u8 channel, u8 bw)
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{
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struct bb_psd_info *psd = &bb->bb_cmn_hooker->bb_psd_i;
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u8 fft_idx = 0;
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psd->fft_point_pre = psd->fft_point;
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psd->fft_point = fft_point;
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if (sw_avg_time == 0)
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sw_avg_time = 1;
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psd->sw_avg_time = sw_avg_time;
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psd->hw_avg_time = hw_avg_time;
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psd->i_q_setting = i_q_setting;
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psd->path = path;
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psd->input = psd_input;
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psd->psd_fc_ch = channel;
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psd->bw = bw;
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if (fft_point == 128)
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fft_idx = 3;
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else if (fft_point == 256)
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fft_idx = 2;
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else if (fft_point == 512)
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fft_idx = 1;
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else if (fft_point == 1024)
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fft_idx = 0;
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halbb_set_reg(bb, psd->psd_reg, BIT(16) | BIT(15), fft_idx);
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halbb_set_reg(bb, psd->psd_reg, BIT(12) | BIT(11), i_q_setting);
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halbb_set_reg(bb, psd->psd_reg, BIT(14) | BIT(13), hw_avg_time);
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halbb_set_reg(bb, psd->psd_reg, BIT(18) | BIT(17), path);
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halbb_set_reg(bb, psd->psd_reg, BIT(20) | BIT(19), psd_input);
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}
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bool halbb_psd_alloc_buff(struct bb_info *bb)
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{
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struct bb_psd_info *psd = &bb->bb_cmn_hooker->bb_psd_i;
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if (!psd->rpt) {
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psd->rpt = (u8 *)halbb_mem_alloc(bb, psd->fft_point);
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} else if (psd->rpt && psd->fft_point != psd->fft_point_pre) {
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halbb_mem_free(bb, psd->rpt, sizeof(psd->rpt));
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psd->rpt = (u8 *)halbb_mem_alloc(bb, psd->fft_point);
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}
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if (!psd->rpt)
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return false;
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else
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return true;
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}
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void halbb_get_gain_index(struct bb_info *bb)
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{
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struct bb_psd_info *psd = &bb->bb_cmn_hooker->bb_psd_i;
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psd->lna_bkp = (u8)halbb_get_reg(bb, 0x1590, 0x7000);
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psd->lna_bkp_b = (u8)halbb_get_reg(bb, 0x1650, 0x7000);
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psd->tia_bkp = (u8)halbb_get_reg(bb, 0x1598, BIT(20));
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psd->tia_bkp_b = (u8)halbb_get_reg(bb, 0x1658, BIT(20));
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psd->rxbb_bkp = (u8)halbb_get_reg(bb, 0x1580, 0x3e0);
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psd->rxbb_bkp_b = (u8)halbb_get_reg(bb, 0x1640, 0x3e0);
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}
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u8 halbb_psd(struct bb_info *bb, enum igi_lv_sel igi_lv, u16 start_point,
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u16 stop_point)
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{
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struct bb_psd_info *psd = &bb->bb_cmn_hooker->bb_psd_i;
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struct bb_api_info *api = &bb->bb_api_i;
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u32 i = 0, mod_tone_idx = 0;
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u32 t = 0;
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u16 fft_max_half_bw = 0;
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u16 fail_cnt = 0;
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u16 valid_cnt = 0;
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u8 psd_fc_ch = psd->psd_fc_ch;
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enum band_type psd_band = psd->psd_band;
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u8 bw = psd->bw;
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u32 psd_result_tmp = 0;
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u32 psd_result_total = 0;
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u8 psd_result = 0;
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u8 psd_result_cali_tone[7] = {0};
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u8 psd_result_cali_val[7] = {0};
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u8 noise_idx = 0;
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u8 set_result = 0;
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u8 psd_pri_ch = 1;
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if (bb->hal_com->chip_id == CHIP_WIFI6_8852A) {
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halbb_mem_cpy(bb, psd_result_cali_tone,
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psd_result_cali_tone_8821, 7);
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halbb_mem_cpy(bb, psd_result_cali_val,
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psd_result_cali_val_8821, 7);
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}
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psd->psd_in_progress = 1;
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halbb_set_reg(bb, 0x014, BIT(1), 1);
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BB_TRACE(" PSD_Start =>\n");
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/* @[Get default gain value]*/
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halbb_get_gain_index(bb);
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/* @[Stop pre-AGC]*/
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/* @[Set High IGI level & make it can't CCA]*/
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halbb_pre_agc_en(bb, false);
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halbb_psd_igi_lv(bb, IGI_LEVEL4);
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halbb_delay_us(bb, 10);
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BB_TRACE(" sw_avg_time = %d , hw_avg_time = %d , IQ = %d , fft_point = %d , path = %d , input = %d , ch = %d , BW = %d\n",
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psd->sw_avg_time, psd->hw_avg_time, psd->i_q_setting,
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psd->fft_point, psd->path, psd->input, psd_fc_ch, bw);
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if (halbb_stop_ic_trx(bb, HALBB_SET) == HALBB_SET_FAIL) {
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/*@[resume pre-AGC and resume IGI level]*/
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halbb_pre_agc_en(bb, true);
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halbb_psd_igi_lv(bb, IGI_DEFAULT);
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return HALBB_SET_FAIL;
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}
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/* @[Set IGI level]*/
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halbb_psd_igi_lv(bb, igi_lv);
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/* @[Backup RF Reg]*/
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psd->rf_0x18_bkp = halbb_read_rf_reg(bb, RF_PATH_A, 0x18,
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RFREGOFFSETMASK);
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psd->rf_0x18_bkp_b = halbb_read_rf_reg(bb, RF_PATH_B, 0x18,
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RFREGOFFSETMASK);
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if ((psd->input == 0) || (psd->input == 1)) {
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if (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)
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psd->psd_bw = 80;
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else
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psd->psd_bw = 160;
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} else if ((psd->input == 2) || (psd->input == 3)) {
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if (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)
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psd->psd_bw = 40;
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else
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psd->psd_bw = 80;
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}
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if (psd->psd_bw == 80)
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halbb_set_reg(bb, 0x9c8, BIT(23), 1);
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else
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halbb_set_reg(bb, 0x9c8, BIT(23), 0);
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BB_DBG(bb, DBG_DBG_API, " PSD_BW = %d\n", psd->psd_bw);
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/* Set RF fc*/
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if(halbb_ctrl_ch(bb, psd_fc_ch, psd_band, HW_PHY_0) == false)
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return HALBB_SET_FAIL;
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if(halbb_ctrl_ch(bb, psd_fc_ch, psd_band, HW_PHY_1) == false)
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return HALBB_SET_FAIL;
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if(halbb_ctrl_bw(bb, psd_pri_ch, bw, HW_PHY_0) == false)
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return HALBB_SET_FAIL;
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if(halbb_ctrl_bw(bb, psd_pri_ch, bw, HW_PHY_1) == false)
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return HALBB_SET_FAIL;
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BB_DBG(bb, DBG_DBG_API, "RF0x18=((0x%x))\n",
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halbb_read_rf_reg(bb, RF_PATH_A, 0x18, RFREGOFFSETMASK));
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halbb_delay_us(bb, 10);
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if (stop_point > (psd->fft_point - 1))
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stop_point = (psd->fft_point - 1);
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if (start_point > (psd->fft_point - 1))
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start_point = (psd->fft_point - 1);
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if (start_point > stop_point)
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stop_point = start_point;
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for (i = start_point; i <= stop_point; i++) {
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fft_max_half_bw = (psd->fft_point) >> 1;
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if (i < fft_max_half_bw)
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mod_tone_idx = i + fft_max_half_bw;
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else
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mod_tone_idx = i - fft_max_half_bw;
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psd_result_tmp = 0;
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psd_result_total = 0;
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fail_cnt = 0;
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for (t = 0; t < psd->sw_avg_time; t++) {
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psd_result_tmp = halbb_get_psd_data(bb, mod_tone_idx,
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psd->igi_pin);
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if (psd_result_tmp == 0)
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fail_cnt ++;
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psd_result_total += psd_result_tmp;
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}
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if (psd->sw_avg_time > fail_cnt)
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valid_cnt = psd->sw_avg_time - fail_cnt;
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else
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valid_cnt = psd->sw_avg_time;
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psd_result = (u8)((psd_result_total / valid_cnt)) -
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psd->psd_pwr_common_offset;
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psd->rpt[i] = psd_result;
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if (psd->fft_point == 128 && psd->noise_k_en) {
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if (i > psd_result_cali_tone[noise_idx])
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noise_idx++;
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if (noise_idx > 6)
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noise_idx = 6;
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if (psd_result >= psd_result_cali_val[noise_idx])
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psd_result = psd_result -
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psd_result_cali_val[noise_idx];
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else
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psd_result = 0;
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psd->psd_result[i] = psd_result;
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}
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BB_DBG(bb, DBG_DBG_API, "[%-4d] N_cali = %d, PSD = %d\n",
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mod_tone_idx, psd_result_cali_val[noise_idx],
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psd_result);
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}
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/*@[Revert Reg]*/
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set_result = halbb_stop_ic_trx(bb, HALBB_REVERT);
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halbb_ctrl_ch(bb, api->central_ch, api->band, HW_PHY_0);
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halbb_ctrl_ch(bb, api->central_ch, api->band, HW_PHY_1);
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halbb_ctrl_bw(bb, api->pri_ch_idx, (enum channel_width)api->bw,
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HW_PHY_0);
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halbb_ctrl_bw(bb, api->pri_ch_idx, (enum channel_width)api->bw,
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HW_PHY_1);
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BB_DBG(bb, DBG_DBG_API, " PSD_finish\n\n");
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/*@[Resume pre-AGC and IGI level]*/
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halbb_pre_agc_en(bb, true);
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halbb_psd_igi_lv(bb, IGI_DEFAULT);
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psd->psd_in_progress = 0;
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return HALBB_SET_SUCCESS;
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}
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void halbb_psd_dbg(struct bb_info *bb, char input[][16], u32 *_used,
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char *output, u32 *_out_len)
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{
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struct bb_psd_info *psd = &bb->bb_cmn_hooker->bb_psd_i;
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char help[] = "-h";
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u32 var1[10] = {0};
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u32 used = *_used;
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u32 out_len = *_out_len;
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u8 i = 0;
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HALBB_SCAN(input[1], DCMD_DECIMAL, &var1[0]);
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if ((_os_strcmp(input[1], help) == 0)) {
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BB_DBG_CNSL(out_len, used, output + used, out_len - used,
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"{0} {sw_avg} {hw_avg 0:3} {0:I,1:Q,2:IQ} {fft_point: 128/256/512/1024}\n{path_sel 0~3} {00: dout_sub20_0_40M, 01: ccx_in, 10: dout_cfir, 11: rxdib_in} {CH} {BW 20/40/80: 0/1/2}\n\n");
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BB_DBG_CNSL(out_len, used, output + used, out_len - used,
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"{1} {IGI_lv(0:4)} {start_point} {stop_point}\n");
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} else if (var1[0] == 0) {
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for (i = 1; i < 10; i++) {
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if (input[i + 1])
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HALBB_SCAN(input[i + 1], DCMD_DECIMAL,
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&var1[i]);
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}
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BB_DBG_CNSL(out_len, used, output + used, out_len - used,
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"sw_avg_time=((%d)), hw_avg_time=((%d)), IQ=((%d)), fft=((%d)), path=((%d)), input =((%d)) ch=((%d)), bw=((%d))\n",
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var1[1], var1[2], var1[3], var1[4], var1[5],
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var1[6], (u8)var1[7], (u8)var1[8]);
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halbb_psd_para_setting(bb, (u8)var1[1], (u8)var1[2],
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(u8)var1[3], (u16)var1[4], (u8)var1[5],
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(u8)var1[6], (u8)var1[7], (u8)var1[8]);
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} else if (var1[0] == 1) {
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HALBB_SCAN(input[2], DCMD_DECIMAL, &var1[1]);
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HALBB_SCAN(input[3], DCMD_DECIMAL, &var1[2]);
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HALBB_SCAN(input[4], DCMD_DECIMAL, &var1[3]);
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BB_DBG_CNSL(out_len, used, output + used, out_len - used,
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"IGI_lv=((0x%x)), start_point=((%d)), stop_point=((%d))\n",
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var1[1], var1[2], var1[3]);
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bb->dbg_component |= DBG_DBG_API;
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if (!halbb_psd_alloc_buff(bb)) {
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BB_DBG_CNSL(out_len, used, output + used,
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out_len - used, "memory alloc FAIL\n");
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return;
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}
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if (halbb_psd(bb, (enum igi_lv_sel)var1[1], (u16)var1[2],
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(u16)var1[3]) == HALBB_SET_FAIL)
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BB_DBG_CNSL(out_len, used, output + used,
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out_len - used, "PSD_SET_FAIL\n");
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bb->dbg_component &= ~(DBG_DBG_API);
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}
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*_used = used;
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*_out_len = out_len;
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}
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void halbb_psd_init(struct bb_info *bb)
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{
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struct bb_psd_info *psd = &bb->bb_cmn_hooker->bb_psd_i;
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BB_DBG(bb, DBG_DBG_API, "[%s]\n", __func__);
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psd->psd_in_progress = false;
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psd->psd_reg = 0x1150;
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psd->psd_report_reg = 0x40b4;
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psd->psd_pwr_common_offset = 0;
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psd->fft_point_pre = 0;
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halbb_psd_para_setting(bb, 1, 3, 2, 512, 0, 0, 36, 0);
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}
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void halbb_psd_deinit(struct bb_info *bb)
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{
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struct bb_psd_info *psd = &bb->bb_cmn_hooker->bb_psd_i;
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if (psd->rpt)
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halbb_mem_free(bb, psd->rpt, sizeof(psd->rpt));
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}
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bool halbb_get_psd_result(struct bb_info *bb, u8 *psd_data, u16 *psd_len)
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{
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struct bb_psd_info *psd = &bb->bb_cmn_hooker->bb_psd_i;
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if (!psd->rpt)
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return false;
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psd_data = psd->rpt;
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*psd_len = psd->fft_point;
|
return true;
|
}
|
|
void halbb_cr_cfg_psd_init(struct bb_info *bb)
|
{
|
struct bb_psd_cr_info *cr = &bb->bb_cmn_hooker->bb_psd_i.bb_psd_cr_i;
|
|
switch (bb->cr_type) {
|
|
#ifdef HALBB_52AA_SERIES
|
case BB_52AA:
|
cr->fft_idx = PSD_FFT_IDX_52AA;
|
cr->fft_idx_m = PSD_FFT_IDX_52AA_M;
|
cr->psd_en = PSD_ENABLE_52AA;
|
cr->psd_en_m = PSD_ENABLE_52AA_M;
|
break;
|
|
#endif
|
#ifdef HALBB_COMPILE_AP_SERIES
|
case BB_AP:
|
cr->fft_idx = PSD_FFT_IDX_A;
|
cr->fft_idx_m = PSD_FFT_IDX_A_M;
|
cr->psd_en = PSD_ENABLE_A;
|
cr->psd_en_m = PSD_ENABLE_A_M;
|
break;
|
|
#endif
|
#ifdef HALBB_COMPILE_CLIENT_SERIES
|
case BB_CLIENT:
|
cr->fft_idx = PSD_FFT_IDX_C;
|
cr->fft_idx_m = PSD_FFT_IDX_C_M;
|
cr->psd_en = PSD_ENABLE_C;
|
cr->psd_en_m = PSD_ENABLE_C_M;
|
break;
|
#endif
|
|
default:
|
break;
|
}
|
|
}
|
#endif
|
