/******************************************************************************
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*
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* Copyright(c) 2007 - 2020 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef _HALBB_PLCP_TX_H_
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#define _HALBB_PLCP_TX_H_
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/* ============================================================
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structure
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============================================================
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*/
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struct bb_plcp_cr_info {
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u32 b_header_0;
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u32 b_header_0_m;
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u32 b_header_1;
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u32 b_header_1_m;
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u32 b_header_2;
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u32 b_header_2_m;
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u32 b_header_3;
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u32 b_header_3_m;
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u32 b_header_4;
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u32 b_header_4_m;
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u32 b_header_5;
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u32 b_header_5_m;
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u32 b_psdu_byte;
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u32 b_psdu_byte_m;
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u32 b_carrier_suppress_tx;
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u32 b_carrier_suppress_tx_m;
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u32 b_ppdu_type;
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u32 b_ppdu_type_m;
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u32 b_psdu_rate;
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u32 b_psdu_rate_m;
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u32 b_service_bit2;
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u32 b_service_bit2_m;
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u32 he_sigb_ch1_0;
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u32 he_sigb_ch1_0_m;
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u32 he_sigb_ch1_1;
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u32 he_sigb_ch1_1_m;
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u32 he_sigb_ch1_10;
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u32 he_sigb_ch1_10_m;
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u32 he_sigb_ch1_11;
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u32 he_sigb_ch1_11_m;
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u32 he_sigb_ch1_12;
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u32 he_sigb_ch1_12_m;
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u32 he_sigb_ch1_13;
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u32 he_sigb_ch1_13_m;
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u32 he_sigb_ch1_14;
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u32 he_sigb_ch1_14_m;
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u32 he_sigb_ch1_15;
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u32 he_sigb_ch1_15_m;
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u32 he_sigb_ch1_2;
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u32 he_sigb_ch1_2_m;
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u32 he_sigb_ch1_3;
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u32 he_sigb_ch1_3_m;
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u32 he_sigb_ch1_4;
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u32 he_sigb_ch1_4_m;
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u32 he_sigb_ch1_5;
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u32 he_sigb_ch1_5_m;
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u32 he_sigb_ch1_6;
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u32 he_sigb_ch1_6_m;
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u32 he_sigb_ch1_7;
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u32 he_sigb_ch1_7_m;
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u32 he_sigb_ch1_8;
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u32 he_sigb_ch1_8_m;
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u32 he_sigb_ch1_9;
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u32 he_sigb_ch1_9_m;
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u32 he_sigb_ch2_0;
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u32 he_sigb_ch2_0_m;
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u32 he_sigb_ch2_1;
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u32 he_sigb_ch2_1_m;
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u32 he_sigb_ch2_10;
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u32 he_sigb_ch2_10_m;
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u32 he_sigb_ch2_11;
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u32 he_sigb_ch2_11_m;
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u32 he_sigb_ch2_12;
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u32 he_sigb_ch2_12_m;
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u32 he_sigb_ch2_13;
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u32 he_sigb_ch2_13_m;
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u32 he_sigb_ch2_14;
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u32 he_sigb_ch2_14_m;
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u32 he_sigb_ch2_15;
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u32 he_sigb_ch2_15_m;
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u32 he_sigb_ch2_2;
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u32 he_sigb_ch2_2_m;
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u32 he_sigb_ch2_3;
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u32 he_sigb_ch2_3_m;
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u32 he_sigb_ch2_4;
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u32 he_sigb_ch2_4_m;
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u32 he_sigb_ch2_5;
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u32 he_sigb_ch2_5_m;
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u32 he_sigb_ch2_6;
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u32 he_sigb_ch2_6_m;
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u32 he_sigb_ch2_7;
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u32 he_sigb_ch2_7_m;
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u32 he_sigb_ch2_8;
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u32 he_sigb_ch2_8_m;
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u32 he_sigb_ch2_9;
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u32 he_sigb_ch2_9_m;
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u32 usr0_delmter;
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u32 usr0_delmter_m;
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u32 usr0_eof_padding_len;
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u32 usr0_eof_padding_len_m;
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u32 usr0_init_seed;
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u32 usr0_init_seed_m;
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u32 usr1_delmter;
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u32 usr1_delmter_m;
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u32 usr1_eof_padding_len;
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u32 usr1_eof_padding_len_m;
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u32 usr1_init_seed;
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u32 usr1_init_seed_m;
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u32 usr2_delmter;
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u32 usr2_delmter_m;
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u32 usr2_eof_padding_len;
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u32 usr2_eof_padding_len_m;
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u32 usr2_init_seed;
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u32 usr2_init_seed_m;
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u32 usr3_delmter;
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u32 usr3_delmter_m;
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u32 usr3_eof_padding_len;
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u32 usr3_eof_padding_len_m;
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u32 usr3_init_seed;
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u32 usr3_init_seed_m;
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u32 vht_sigb0;
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u32 vht_sigb0_m;
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u32 vht_sigb1;
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u32 vht_sigb1_m;
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u32 vht_sigb2;
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u32 vht_sigb2_m;
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u32 he_sigb_mcs;
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u32 he_sigb_mcs_m;
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u32 vht_sigb3;
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u32 vht_sigb3_m;
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u32 n_ltf;
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u32 n_ltf_m;
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u32 siga1;
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u32 siga1_m;
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u32 siga2;
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u32 siga2_m;
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u32 lsig;
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u32 lsig_m;
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u32 cca_pw_th;
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u32 cca_pw_th_m;
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u32 n_sym;
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u32 n_sym_m;
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u32 usr0_service;
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u32 usr0_service_m;
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u32 usr1_service;
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u32 usr1_service_m;
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u32 usr2_service;
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u32 usr2_service_m;
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u32 usr3_service;
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u32 usr3_service_m;
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u32 usr0_mdpu_len_byte;
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u32 usr0_mdpu_len_byte_m;
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u32 usr1_mdpu_len_byte;
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u32 usr1_mdpu_len_byte_m;
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u32 obw_cts2self_dup_type;
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u32 obw_cts2self_dup_type_m;
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u32 usr2_mdpu_len_byte;
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u32 usr2_mdpu_len_byte_m;
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u32 usr3_mdpu_len_byte;
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u32 usr3_mdpu_len_byte_m;
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u32 usr0_csi_buf_id;
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u32 usr0_csi_buf_id_m;
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u32 usr1_csi_buf_id;
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u32 usr1_csi_buf_id_m;
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u32 rf_gain_idx;
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u32 rf_gain_idx_m;
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u32 usr2_csi_buf_id;
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u32 usr2_csi_buf_id_m;
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u32 usr3_csi_buf_id;
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u32 usr3_csi_buf_id_m;
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u32 usr0_n_mpdu;
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u32 usr0_n_mpdu_m;
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u32 usr1_n_mpdu;
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u32 usr1_n_mpdu_m;
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u32 usr2_n_mpdu;
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u32 usr2_n_mpdu_m;
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u32 usr0_pw_boost_fctr_db;
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u32 usr0_pw_boost_fctr_db_m;
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u32 usr3_n_mpdu;
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u32 usr3_n_mpdu_m;
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u32 ch20_with_data;
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u32 ch20_with_data_m;
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u32 n_usr;
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u32 n_usr_m;
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u32 txcmd_txtp;
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u32 txcmd_txtp_m;
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u32 usr0_ru_alloc;
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u32 usr0_ru_alloc_m;
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u32 usr0_u_id;
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u32 usr0_u_id_m;
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u32 usr1_ru_alloc;
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u32 usr1_ru_alloc_m;
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u32 usr1_u_id;
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u32 usr1_u_id_m;
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u32 usr2_ru_alloc;
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u32 usr2_ru_alloc_m;
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u32 usr2_u_id;
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u32 usr2_u_id_m;
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u32 usr3_ru_alloc;
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u32 usr3_ru_alloc_m;
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u32 usr3_u_id;
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u32 usr3_u_id_m;
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u32 n_sym_hesigb;
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u32 n_sym_hesigb_m;
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u32 usr0_mcs;
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u32 usr0_mcs_m;
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u32 usr1_mcs;
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u32 usr1_mcs_m;
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u32 usr2_mcs;
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u32 usr2_mcs_m;
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u32 usr3_mcs;
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u32 usr3_mcs_m;
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u32 usr1_pw_boost_fctr_db;
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u32 usr1_pw_boost_fctr_db_m;
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u32 usr2_pw_boost_fctr_db;
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u32 usr2_pw_boost_fctr_db_m;
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u32 usr3_pw_boost_fctr_db;
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u32 usr3_pw_boost_fctr_db_m;
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u32 ppdu_type;
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u32 ppdu_type_m;
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u32 txsc;
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u32 txsc_m;
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u32 cfo_comp;
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u32 cfo_comp_m;
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u32 pkt_ext_idx;
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u32 pkt_ext_idx_m;
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u32 usr0_n_sts;
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u32 usr0_n_sts_m;
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u32 usr0_n_sts_ru_tot;
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u32 usr0_n_sts_ru_tot_m;
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u32 usr0_strt_sts;
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u32 usr0_strt_sts_m;
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u32 usr1_n_sts;
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u32 usr1_n_sts_m;
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u32 usr1_n_sts_ru_tot;
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u32 usr1_n_sts_ru_tot_m;
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u32 usr1_strt_sts;
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u32 usr1_strt_sts_m;
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u32 usr2_n_sts;
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u32 usr2_n_sts_m;
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u32 usr2_n_sts_ru_tot;
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u32 usr2_n_sts_ru_tot_m;
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u32 usr2_strt_sts;
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u32 usr2_strt_sts_m;
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u32 usr3_n_sts;
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u32 usr3_n_sts_m;
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u32 usr3_n_sts_ru_tot;
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u32 usr3_n_sts_ru_tot_m;
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u32 usr3_strt_sts;
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u32 usr3_strt_sts_m;
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u32 source_gen_mode_idx;
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u32 source_gen_mode_idx_m;
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u32 gi_type;
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u32 gi_type_m;
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u32 ltf_type;
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u32 ltf_type_m;
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u32 dbw_idx;
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u32 dbw_idx_m;
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u32 pre_fec_fctr;
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u32 pre_fec_fctr_m;
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u32 beam_change_en;
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u32 beam_change_en_m;
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u32 doppler_en;
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u32 doppler_en_m;
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u32 fb_mumimo_en;
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u32 fb_mumimo_en_m;
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u32 feedback_status;
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u32 feedback_status_m;
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u32 he_sigb_dcm_en;
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u32 he_sigb_dcm_en_m;
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u32 midamble_mode;
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u32 midamble_mode_m;
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u32 mumimo_ltf_mode_en;
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u32 mumimo_ltf_mode_en_m;
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u32 ndp;
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u32 ndp_m;
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u32 stbc_en;
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u32 stbc_en_m;
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u32 ant_sel_a;
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u32 ant_sel_a_m;
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u32 ant_sel_b;
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u32 ant_sel_b_m;
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u32 ant_sel_c;
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u32 ant_sel_c_m;
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u32 ant_sel_d;
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u32 ant_sel_d_m;
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u32 cca_pw_th_en;
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u32 cca_pw_th_en_m;
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u32 rf_fixed_gain_en;
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u32 rf_fixed_gain_en_m;
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u32 ul_cqi_rpt_tri;
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u32 ul_cqi_rpt_tri_m;
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u32 ldpc_extr;
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u32 ldpc_extr_m;
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u32 usr0_dcm_en;
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u32 usr0_dcm_en_m;
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u32 usr0_fec_type;
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u32 usr0_fec_type_m;
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u32 usr0_txbf_en;
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u32 usr0_txbf_en_m;
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u32 usr1_dcm_en;
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u32 usr1_dcm_en_m;
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u32 usr1_fec_type;
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u32 usr1_fec_type_m;
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u32 usr1_txbf_en;
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u32 usr1_txbf_en_m;
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u32 usr2_dcm_en;
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u32 usr2_dcm_en_m;
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u32 usr2_fec_type;
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u32 usr2_fec_type_m;
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u32 usr2_txbf_en;
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u32 usr2_txbf_en_m;
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u32 usr3_dcm_en;
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u32 usr3_dcm_en_m;
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u32 usr3_fec_type;
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u32 usr3_fec_type_m;
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u32 usr3_txbf_en;
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u32 usr3_txbf_en_m;
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u32 usr0_precoding_mode_idx;
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u32 usr0_precoding_mode_idx_m;
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u32 usr1_precoding_mode_idx;
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u32 usr1_precoding_mode_idx_m;
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u32 usr2_precoding_mode_idx;
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u32 usr2_precoding_mode_idx_m;
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u32 usr3_precoding_mode_idx;
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u32 usr3_precoding_mode_idx_m;
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u32 b_rate_idx;
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u32 b_rate_idx_m;
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u32 b_locked_clk_en;
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u32 b_locked_clk_en_m;
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};
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struct bb_plcp_info {
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struct bb_plcp_cr_info bb_plcp_cr_i;
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};
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/* ============================================================
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Function Prototype
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============================================================
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*/
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struct bb_info;
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void halbb_cr_cfg_plcp_init(struct bb_info *bb);
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#endif
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