/******************************************************************************
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*
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* Copyright(c) 2007 - 2020 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#include "halbb_precomp.h"
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void halbb_cfg_bb_rpl_ofst(struct bb_info *bb, enum bb_band_t band, u8 path, u32 addr, u32 data)
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{
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struct bb_gain_info *gain = &bb->bb_gain_i;
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u8 i = 0;
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u8 bw = (u8)(addr & 0xf0) >> 4;
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u8 rxsc_start = (u8)(addr & 0xf);
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u8 rxsc = 0;
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s8 ofst = 0;
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if (bw == (u8)CHANNEL_WIDTH_20) {
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gain->rpl_ofst_20[band][path] = (s8)data;
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BB_DBG(bb, DBG_INIT, "RPL[Band:%d][path=%d][%dM][rxsc=%d]=%d\n",
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band, path, (20 << bw), rxsc, gain->rpl_ofst_20[band][path]);
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} else if (bw == (u8)CHANNEL_WIDTH_40){
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if (rxsc_start == BB_RXSC_START_IDX_FULL) {
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gain->rpl_ofst_40[band][path][0] = (s8)data;
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BB_DBG(bb, DBG_INIT, "RPL[Band:%d][path=%d][%dM][rxsc=%d]=%d\n",
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band, path, (20 << bw), rxsc,
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gain->rpl_ofst_40[band][path][0]);
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} else if (rxsc_start == BB_RXSC_START_IDX_20) {
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for (i = 0; i < 2; i++) {
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rxsc = BB_RXSC_START_IDX_20 + i;
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ofst = (s8)((data >> (8 * i)) & 0xff);
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gain->rpl_ofst_40[band][path][rxsc] = ofst;
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BB_DBG(bb, DBG_INIT, "RPL[Band:%d][path=%d][%dM][rxsc=%d]=%d\n",
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band, path, (20 << bw), rxsc,
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gain->rpl_ofst_40[band][path][rxsc]);
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}
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}
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} else if (bw == (u8)CHANNEL_WIDTH_80){
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if (rxsc_start == BB_RXSC_START_IDX_FULL) {
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gain->rpl_ofst_80[band][path][0] = (s8)data;
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BB_DBG(bb, DBG_INIT, "RPL[Band:%d][path=%d][%dM][rxsc=%d]=%d\n",
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band, path, (20 << bw), rxsc,
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gain->rpl_ofst_80[band][path][0]);
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} else if (rxsc_start == BB_RXSC_START_IDX_20) {
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for (i = 0; i < 4; i++) {
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rxsc = BB_RXSC_START_IDX_20 + i;
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ofst = (s8)((data >> (8 * i)) & 0xff);
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gain->rpl_ofst_80[band][path][rxsc] = ofst;
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BB_DBG(bb, DBG_INIT, "RPL[Band:%d][path=%d][%dM][rxsc=%d]=%d\n",
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band, path, (20 << bw), rxsc,
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gain->rpl_ofst_80[band][path][rxsc]);
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}
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} else if (rxsc_start == BB_RXSC_START_IDX_40) {
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for (i = 0; i < 2; i++) {
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rxsc = BB_RXSC_START_IDX_40 + i;
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ofst = (s8)((data >> (8 * i)) & 0xff);
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gain->rpl_ofst_80[band][path][rxsc] = ofst;
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BB_DBG(bb, DBG_INIT, "RPL[Band:%d][path=%d][%dM][rxsc=%d]=%d\n",
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band, path, (20 << bw), rxsc,
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gain->rpl_ofst_80[band][path][rxsc]);
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}
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}
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}
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}
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bool halbb_init_cr_default(struct bb_info *bb, bool is_form_folder, u32 folder_len,
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u32 *folder_array, enum phl_phy_idx phy_idx)
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{
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bool result = true;
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if (!bb->bb_cmn_info_init_ready) {
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BB_WARNING("bb_cmn_info_init_ready = false");
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return false;
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}
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if (is_form_folder) {
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if (!folder_array) {
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BB_WARNING("[%s] folder_array=NULL\n", __func__);
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return false;
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}
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if (folder_len == 0) {
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BB_WARNING("[%s] folder_len=0\n", __func__);
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return false;
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}
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}
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#ifdef HALBB_DBCC_SUPPORT
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if (phy_idx == HW_PHY_1 && !bb->hal_com->dbcc_en) {
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BB_WARNING("[%s]\n",__func__);
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if (!bb->bb_dbg_i.cr_dbg_mode_en)
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return false;
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}
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#endif
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BB_DBG(bb, DBG_INIT, "[%s] ic=%d\n", __func__, bb->hal_com->chip_id);
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switch (bb->ic_type) {
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case BB_RTL8852AA:
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#ifdef BB_8852A_CAV_SUPPORT
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result = halbb_cfg_bbcr_ax_8852a(bb, is_form_folder, folder_len,
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folder_array, phy_idx);
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#else
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BB_WARNING("[%s] NOT Support 8852AA\n", __func__);
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result = false;
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#endif
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break;
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#ifdef BB_8852A_2_SUPPORT
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case BB_RTL8852A:
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result = halbb_cfg_bbcr_ax_8852a_2(bb, is_form_folder, folder_len,
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folder_array, phy_idx);
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halbb_tpu_mac_cr_init(bb, phy_idx);
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break;
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#endif
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#ifdef BB_8852B_SUPPORT
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case BB_RTL8852B:
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result = halbb_cfg_bbcr_ax_8852b(bb, is_form_folder, folder_len,
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folder_array, phy_idx);
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halbb_tpu_mac_cr_init(bb, phy_idx);
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break;
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#endif
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#ifdef BB_8852C_SUPPORT
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case BB_RTL8852C:
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result = halbb_cfg_bbcr_ax_8852c(bb, is_form_folder, folder_len,
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folder_array, phy_idx);
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halbb_tpu_mac_cr_init(bb, phy_idx);
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break;
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#endif
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default:
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BB_WARNING("[%s] ic=%d\n", __func__, bb->hal_com->chip_id);
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break;
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}
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BB_DBG(bb, DBG_INIT, "BB_CR_init_success = %d\n", result);
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return result;
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}
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bool halbb_init_gain_table(struct bb_info *bb, bool is_form_folder, u32 folder_len,
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u32 *folder_array, enum phl_phy_idx phy_idx)
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{
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bool result = true;
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if (!bb->bb_cmn_info_init_ready) {
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BB_WARNING("bb_cmn_info_init_ready = false");
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return false;
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}
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if (is_form_folder) {
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if (!folder_array) {
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BB_WARNING("[%s] folder_array=NULL\n", __func__);
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return false;
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}
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if (folder_len == 0) {
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BB_WARNING("[%s] folder_len=0\n", __func__);
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return false;
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}
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}
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#ifdef HALBB_DBCC_SUPPORT
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if (phy_idx == HW_PHY_1 && !bb->hal_com->dbcc_en) {
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BB_WARNING("[%s]\n",__func__);
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if (!bb->bb_dbg_i.cr_dbg_mode_en)
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return false;
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}
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#endif
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BB_DBG(bb, DBG_INIT, "[%s] ic=%d\n", __func__, bb->hal_com->chip_id);
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switch (bb->ic_type) {
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#ifdef BB_8852A_2_SUPPORT
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case BB_RTL8852A:
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result &= halbb_cfg_bb_gain_ax_8852a_2(bb, is_form_folder,
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folder_len, folder_array);
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break;
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#endif
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#ifdef BB_8852B_SUPPORT
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case BB_RTL8852B:
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result &= halbb_cfg_bb_gain_ax_8852b(bb, is_form_folder,
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folder_len, folder_array);
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break;
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#endif
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#ifdef BB_8852C_SUPPORT
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case BB_RTL8852C:
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result &= halbb_cfg_bb_gain_ax_8852c(bb, is_form_folder,
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folder_len, folder_array);
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break;
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#endif
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default:
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BB_WARNING("[%s] ic=%d\n", __func__, bb->hal_com->chip_id);
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break;
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}
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BB_DBG(bb, DBG_INIT, "BB_Gain_table_init_success = %d\n", result);
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return result;
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}
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bool halbb_init_reg(struct bb_info *bb)
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{
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struct rtw_para_info_t *reg = NULL;
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bool rpt_0 = true, rpt_1 = true, rpt_gain = true;
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reg = &bb->phl_com->phy_sw_cap[HW_PHY_0].bb_phy_reg_info;
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rpt_0 = halbb_init_cr_default(bb, reg->para_src, reg->para_data_len, reg->para_data, HW_PHY_0);
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if (bb->hal_com->dbcc_en) {
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reg = &bb->phl_com->phy_sw_cap[HW_PHY_1].bb_phy_reg_info;
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rpt_1 = halbb_init_cr_default(bb, reg->para_src, reg->para_data_len, reg->para_data, HW_PHY_1);
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}
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reg = &bb->phl_com->phy_sw_cap[HW_PHY_0].bb_phy_reg_gain_info;
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rpt_gain = halbb_init_gain_table(bb, reg->para_src, reg->para_data_len, reg->para_data, HW_PHY_0);
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if (rpt_0 && rpt_1 && rpt_gain)
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return true;
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else
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return false;
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}
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void halbb_rx_gain_table_dbg(struct bb_info *bb, char input[][16],
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u32 *_used, char *output, u32 *_out_len)
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{
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struct bb_gain_info *gain = &bb->bb_gain_i;
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u32 val[10] = {0};
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u8 i = 0, j = 0;
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if (_os_strcmp(input[1], "-h") == 0) {
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"{show}\n");
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"set {lna, tia} band path idx val\n");
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return;
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}
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if (_os_strcmp(input[1], "show") == 0) {
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for (i = 0; i < BB_GAIN_BAND_NUM; i++) {
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if (i == 0) {
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"===[2G]===\n");
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} else {
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"===[5G-%s]===\n", (i == 1) ? ("Low") : ((i == 2) ? "Mid" : "High"));
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}
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for (j = 0; j < HALBB_MAX_PATH; j++) {
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"LNA_gain[Path=%d] = {%d, %d, %d, %d, %d, %d, %d}\n",
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j,
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gain->lna_gain[i][j][0],
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gain->lna_gain[i][j][1],
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gain->lna_gain[i][j][2],
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gain->lna_gain[i][j][3],
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gain->lna_gain[i][j][4],
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gain->lna_gain[i][j][5],
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gain->lna_gain[i][j][6]);
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"TIA_gain[Path=%d] = {%d, %d}\n",
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j,
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gain->tia_gain[i][j][0],
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gain->tia_gain[i][j][1]);
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}
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}
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} else if (_os_strcmp(input[1], "set") == 0) {
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HALBB_SCAN(input[3], DCMD_DECIMAL, &val[0]);
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HALBB_SCAN(input[4], DCMD_DECIMAL, &val[1]);
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HALBB_SCAN(input[5], DCMD_DECIMAL, &val[2]);
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HALBB_SCAN(input[6], DCMD_DECIMAL, &val[3]);
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if (_os_strcmp(input[2], "lna") == 0) {
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if (val[0] >= BB_GAIN_BAND_NUM ||
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val[1] >= HALBB_MAX_PATH ||
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val[2] >= IC_LNA_NUM) {
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"Set Err\n");
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return;
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}
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gain->lna_gain[val[0]][val[1]][val[2]] = (s8)val[3];
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"Set lna_gain[%d][%d][%d] = %d\n",
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val[0], val[1], val[2], val[3]);
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} else if (_os_strcmp(input[2], "tia") == 0) {
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if (val[0] >= BB_GAIN_BAND_NUM ||
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val[1] >= HALBB_MAX_PATH ||
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val[2] >= IC_TIA_NUM) {
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"Set Err\n");
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return;
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}
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gain->tia_gain[val[0]][val[1]][val[2]] = (s8)val[3];
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"Set tia_gain[%d][%d][%d] = %d\n",
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val[0], val[1], val[2], val[3]);
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}
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halbb_set_gain_error(bb, bb->hal_com->band[bb->bb_phy_idx].cur_chandef.center_ch);
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} else {
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BB_DBG_CNSL(*_out_len, *_used, output + *_used, *_out_len - *_used,
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"Set Err\n");
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}
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}
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