/* SPDX-License-Identifier: ISC */
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/*
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* Copyright (c) 2004-2011 Atheros Communications Inc.
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* Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
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* Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
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*/
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#ifndef _USB_H_
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#define _USB_H_
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/* constants */
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#define TX_URB_COUNT 32
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#define RX_URB_COUNT 32
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#define ATH10K_USB_RX_BUFFER_SIZE 4096
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#define ATH10K_USB_PIPE_INVALID ATH10K_USB_PIPE_MAX
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/* USB endpoint definitions */
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#define ATH10K_USB_EP_ADDR_APP_CTRL_IN 0x81
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#define ATH10K_USB_EP_ADDR_APP_DATA_IN 0x82
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#define ATH10K_USB_EP_ADDR_APP_DATA2_IN 0x83
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#define ATH10K_USB_EP_ADDR_APP_INT_IN 0x84
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#define ATH10K_USB_EP_ADDR_APP_CTRL_OUT 0x01
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#define ATH10K_USB_EP_ADDR_APP_DATA_LP_OUT 0x02
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#define ATH10K_USB_EP_ADDR_APP_DATA_MP_OUT 0x03
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#define ATH10K_USB_EP_ADDR_APP_DATA_HP_OUT 0x04
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/* diagnostic command defnitions */
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#define ATH10K_USB_CONTROL_REQ_SEND_BMI_CMD 1
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#define ATH10K_USB_CONTROL_REQ_RECV_BMI_RESP 2
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#define ATH10K_USB_CONTROL_REQ_DIAG_CMD 3
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#define ATH10K_USB_CONTROL_REQ_DIAG_RESP 4
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#define ATH10K_USB_CTRL_DIAG_CC_READ 0
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#define ATH10K_USB_CTRL_DIAG_CC_WRITE 1
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#define ATH10K_USB_IS_BULK_EP(attr) (((attr) & 3) == 0x02)
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#define ATH10K_USB_IS_INT_EP(attr) (((attr) & 3) == 0x03)
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#define ATH10K_USB_IS_ISOC_EP(attr) (((attr) & 3) == 0x01)
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#define ATH10K_USB_IS_DIR_IN(addr) ((addr) & 0x80)
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struct ath10k_usb_ctrl_diag_cmd_write {
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__le32 cmd;
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__le32 address;
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__le32 value;
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__le32 padding;
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} __packed;
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struct ath10k_usb_ctrl_diag_cmd_read {
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__le32 cmd;
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__le32 address;
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} __packed;
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struct ath10k_usb_ctrl_diag_resp_read {
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u8 value[4];
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} __packed;
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/* tx/rx pipes for usb */
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enum ath10k_usb_pipe_id {
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ATH10K_USB_PIPE_TX_CTRL = 0,
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ATH10K_USB_PIPE_TX_DATA_LP,
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ATH10K_USB_PIPE_TX_DATA_MP,
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ATH10K_USB_PIPE_TX_DATA_HP,
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ATH10K_USB_PIPE_RX_CTRL,
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ATH10K_USB_PIPE_RX_DATA,
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ATH10K_USB_PIPE_RX_DATA2,
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ATH10K_USB_PIPE_RX_INT,
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ATH10K_USB_PIPE_MAX
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};
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struct ath10k_usb_pipe {
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struct list_head urb_list_head;
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struct usb_anchor urb_submitted;
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u32 urb_alloc;
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u32 urb_cnt;
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u32 urb_cnt_thresh;
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unsigned int usb_pipe_handle;
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u32 flags;
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u8 ep_address;
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u8 logical_pipe_num;
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struct ath10k_usb *ar_usb;
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u16 max_packet_size;
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struct work_struct io_complete_work;
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struct sk_buff_head io_comp_queue;
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struct usb_endpoint_descriptor *ep_desc;
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};
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#define ATH10K_USB_PIPE_FLAG_TX BIT(0)
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/* usb device object */
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struct ath10k_usb {
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/* protects pipe->urb_list_head and pipe->urb_cnt */
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spinlock_t cs_lock;
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struct usb_device *udev;
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struct usb_interface *interface;
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struct ath10k_usb_pipe pipes[ATH10K_USB_PIPE_MAX];
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u8 *diag_cmd_buffer;
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u8 *diag_resp_buffer;
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struct ath10k *ar;
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};
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/* usb urb object */
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struct ath10k_urb_context {
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struct list_head link;
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struct ath10k_usb_pipe *pipe;
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struct sk_buff *skb;
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struct ath10k *ar;
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};
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static inline struct ath10k_usb *ath10k_usb_priv(struct ath10k *ar)
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{
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return (struct ath10k_usb *)ar->drv_priv;
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}
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#endif
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