/* SPDX-License-Identifier: ISC */
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/*
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* Copyright (c) 2018 The Linux Foundation. All rights reserved.
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*/
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#ifndef _ATH10K_QMI_H_
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#define _ATH10K_QMI_H_
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#include <linux/soc/qcom/qmi.h>
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#include <linux/qrtr.h>
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#include "qmi_wlfw_v01.h"
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#define MAX_NUM_MEMORY_REGIONS 2
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#define MAX_TIMESTAMP_LEN 32
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#define MAX_BUILD_ID_LEN 128
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#define MAX_NUM_CAL_V01 5
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enum ath10k_qmi_driver_event_type {
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ATH10K_QMI_EVENT_SERVER_ARRIVE,
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ATH10K_QMI_EVENT_SERVER_EXIT,
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ATH10K_QMI_EVENT_FW_READY_IND,
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ATH10K_QMI_EVENT_FW_DOWN_IND,
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ATH10K_QMI_EVENT_MSA_READY_IND,
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ATH10K_QMI_EVENT_MAX,
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};
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struct ath10k_msa_mem_info {
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phys_addr_t addr;
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u32 size;
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bool secure;
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};
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struct ath10k_qmi_chip_info {
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u32 chip_id;
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u32 chip_family;
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};
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struct ath10k_qmi_board_info {
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u32 board_id;
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};
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struct ath10k_qmi_soc_info {
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u32 soc_id;
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};
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struct ath10k_qmi_cal_data {
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u32 cal_id;
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u32 total_size;
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u8 *data;
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};
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struct ath10k_tgt_pipe_cfg {
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__le32 pipe_num;
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__le32 pipe_dir;
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__le32 nentries;
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__le32 nbytes_max;
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__le32 flags;
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__le32 reserved;
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};
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struct ath10k_svc_pipe_cfg {
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__le32 service_id;
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__le32 pipe_dir;
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__le32 pipe_num;
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};
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struct ath10k_shadow_reg_cfg {
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__le16 ce_id;
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__le16 reg_offset;
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};
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struct ath10k_qmi_wlan_enable_cfg {
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u32 num_ce_tgt_cfg;
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struct ath10k_tgt_pipe_cfg *ce_tgt_cfg;
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u32 num_ce_svc_pipe_cfg;
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struct ath10k_svc_pipe_cfg *ce_svc_cfg;
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u32 num_shadow_reg_cfg;
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struct ath10k_shadow_reg_cfg *shadow_reg_cfg;
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};
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struct ath10k_qmi_driver_event {
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struct list_head list;
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enum ath10k_qmi_driver_event_type type;
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void *data;
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};
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enum ath10k_qmi_state {
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ATH10K_QMI_STATE_INIT_DONE,
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ATH10K_QMI_STATE_DEINIT,
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};
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struct ath10k_qmi {
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struct ath10k *ar;
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struct qmi_handle qmi_hdl;
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struct sockaddr_qrtr sq;
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struct work_struct event_work;
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struct workqueue_struct *event_wq;
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struct list_head event_list;
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spinlock_t event_lock; /* spinlock for qmi event list */
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u32 nr_mem_region;
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struct ath10k_msa_mem_info mem_region[MAX_NUM_MEMORY_REGIONS];
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struct ath10k_qmi_chip_info chip_info;
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struct ath10k_qmi_board_info board_info;
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struct ath10k_qmi_soc_info soc_info;
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char fw_build_id[MAX_BUILD_ID_LEN + 1];
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u32 fw_version;
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bool fw_ready;
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char fw_build_timestamp[MAX_TIMESTAMP_LEN + 1];
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struct ath10k_qmi_cal_data cal_data[MAX_NUM_CAL_V01];
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bool msa_fixed_perm;
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enum ath10k_qmi_state state;
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};
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int ath10k_qmi_wlan_enable(struct ath10k *ar,
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struct ath10k_qmi_wlan_enable_cfg *config,
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enum wlfw_driver_mode_enum_v01 mode,
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const char *version);
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int ath10k_qmi_wlan_disable(struct ath10k *ar);
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int ath10k_qmi_init(struct ath10k *ar, u32 msa_size);
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int ath10k_qmi_deinit(struct ath10k *ar);
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int ath10k_qmi_set_fw_log_mode(struct ath10k *ar, u8 fw_log_mode);
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#endif /* ATH10K_QMI_H */
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