/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* linux/drivers/acorn/net/ether3.h
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*
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* Copyright (C) 1995-2000 Russell King
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*
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* network driver for Acorn/ANT Ether3 cards
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*/
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#ifndef _LINUX_ether3_H
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#define _LINUX_ether3_H
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/* use 0 for production, 1 for verification, >2 for debug. debug flags: */
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#define DEBUG_TX 2
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#define DEBUG_RX 4
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#define DEBUG_INT 8
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#define DEBUG_IC 16
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#ifndef NET_DEBUG
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#define NET_DEBUG 0
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#endif
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#define priv(dev) ((struct dev_priv *)netdev_priv(dev))
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/* Command register definitions & bits */
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#define REG_COMMAND (priv(dev)->seeq + 0x0000)
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#define CMD_ENINTDMA 0x0001
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#define CMD_ENINTRX 0x0002
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#define CMD_ENINTTX 0x0004
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#define CMD_ENINTBUFWIN 0x0008
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#define CMD_ACKINTDMA 0x0010
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#define CMD_ACKINTRX 0x0020
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#define CMD_ACKINTTX 0x0040
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#define CMD_ACKINTBUFWIN 0x0080
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#define CMD_DMAON 0x0100
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#define CMD_RXON 0x0200
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#define CMD_TXON 0x0400
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#define CMD_DMAOFF 0x0800
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#define CMD_RXOFF 0x1000
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#define CMD_TXOFF 0x2000
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#define CMD_FIFOREAD 0x4000
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#define CMD_FIFOWRITE 0x8000
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/* status register */
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#define REG_STATUS (priv(dev)->seeq + 0x0000)
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#define STAT_ENINTSTAT 0x0001
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#define STAT_ENINTRX 0x0002
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#define STAT_ENINTTX 0x0004
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#define STAT_ENINTBUFWIN 0x0008
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#define STAT_INTDMA 0x0010
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#define STAT_INTRX 0x0020
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#define STAT_INTTX 0x0040
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#define STAT_INTBUFWIN 0x0080
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#define STAT_DMAON 0x0100
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#define STAT_RXON 0x0200
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#define STAT_TXON 0x0400
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#define STAT_FIFOFULL 0x2000
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#define STAT_FIFOEMPTY 0x4000
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#define STAT_FIFODIR 0x8000
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/* configuration register 1 */
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#define REG_CONFIG1 (priv(dev)->seeq + 0x0040)
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#define CFG1_BUFSELSTAT0 0x0000
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#define CFG1_BUFSELSTAT1 0x0001
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#define CFG1_BUFSELSTAT2 0x0002
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#define CFG1_BUFSELSTAT3 0x0003
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#define CFG1_BUFSELSTAT4 0x0004
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#define CFG1_BUFSELSTAT5 0x0005
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#define CFG1_ADDRPROM 0x0006
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#define CFG1_TRANSEND 0x0007
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#define CFG1_LOCBUFMEM 0x0008
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#define CFG1_INTVECTOR 0x0009
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#define CFG1_RECVSPECONLY 0x0000
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#define CFG1_RECVSPECBROAD 0x4000
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#define CFG1_RECVSPECBRMULTI 0x8000
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#define CFG1_RECVPROMISC 0xC000
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/* The following aren't in 8004 */
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#define CFG1_DMABURSTCONT 0x0000
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#define CFG1_DMABURST800NS 0x0010
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#define CFG1_DMABURST1600NS 0x0020
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#define CFG1_DMABURST3200NS 0x0030
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#define CFG1_DMABURST1 0x0000
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#define CFG1_DMABURST4 0x0040
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#define CFG1_DMABURST8 0x0080
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#define CFG1_DMABURST16 0x00C0
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#define CFG1_RECVCOMPSTAT0 0x0100
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#define CFG1_RECVCOMPSTAT1 0x0200
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#define CFG1_RECVCOMPSTAT2 0x0400
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#define CFG1_RECVCOMPSTAT3 0x0800
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#define CFG1_RECVCOMPSTAT4 0x1000
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#define CFG1_RECVCOMPSTAT5 0x2000
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/* configuration register 2 */
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#define REG_CONFIG2 (priv(dev)->seeq + 0x0080)
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#define CFG2_BYTESWAP 0x0001
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#define CFG2_ERRENCRC 0x0008
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#define CFG2_ERRENDRIBBLE 0x0010
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#define CFG2_ERRSHORTFRAME 0x0020
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#define CFG2_SLOTSELECT 0x0040
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#define CFG2_PREAMSELECT 0x0080
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#define CFG2_ADDRLENGTH 0x0100
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#define CFG2_RECVCRC 0x0200
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#define CFG2_XMITNOCRC 0x0400
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#define CFG2_LOOPBACK 0x0800
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#define CFG2_CTRLO 0x1000
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#define CFG2_RESET 0x8000
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#define REG_RECVEND (priv(dev)->seeq + 0x00c0)
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#define REG_BUFWIN (priv(dev)->seeq + 0x0100)
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#define REG_RECVPTR (priv(dev)->seeq + 0x0140)
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#define REG_TRANSMITPTR (priv(dev)->seeq + 0x0180)
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#define REG_DMAADDR (priv(dev)->seeq + 0x01c0)
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/*
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* Cards transmit/receive headers
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*/
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#define TX_NEXT (0xffff)
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#define TXHDR_ENBABBLEINT (1 << 16)
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#define TXHDR_ENCOLLISIONINT (1 << 17)
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#define TXHDR_EN16COLLISION (1 << 18)
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#define TXHDR_ENSUCCESS (1 << 19)
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#define TXHDR_DATAFOLLOWS (1 << 21)
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#define TXHDR_CHAINCONTINUE (1 << 22)
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#define TXHDR_TRANSMIT (1 << 23)
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#define TXSTAT_BABBLED (1 << 24)
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#define TXSTAT_COLLISION (1 << 25)
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#define TXSTAT_16COLLISIONS (1 << 26)
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#define TXSTAT_DONE (1 << 31)
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#define RX_NEXT (0xffff)
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#define RXHDR_CHAINCONTINUE (1 << 6)
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#define RXHDR_RECEIVE (1 << 7)
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#define RXSTAT_OVERSIZE (1 << 8)
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#define RXSTAT_CRCERROR (1 << 9)
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#define RXSTAT_DRIBBLEERROR (1 << 10)
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#define RXSTAT_SHORTPACKET (1 << 11)
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#define RXSTAT_DONE (1 << 15)
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#define TX_START 0x0000
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#define TX_END 0x6000
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#define RX_START 0x6000
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#define RX_LEN 0xA000
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#define RX_END 0x10000
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/* must be a power of 2 and greater than MAX_TX_BUFFERED */
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#define MAX_TXED 16
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#define MAX_TX_BUFFERED 10
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struct dev_priv {
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void __iomem *base;
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void __iomem *seeq;
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struct {
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unsigned int command;
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unsigned int config1;
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unsigned int config2;
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} regs;
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unsigned char tx_head; /* buffer nr to insert next packet */
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unsigned char tx_tail; /* buffer nr of transmitting packet */
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unsigned int rx_head; /* address to fetch next packet from */
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struct timer_list timer;
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struct net_device *dev;
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int broken; /* 0 = ok, 1 = something went wrong */
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};
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struct ether3_data {
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const char name[8];
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unsigned long base_offset;
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};
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#endif
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