/*
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* Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
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* Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
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* Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved.
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* Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2004 Voltaire, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/hardirq.h>
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#include <linux/export.h>
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#include <linux/mlx4/cmd.h>
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#include <linux/mlx4/cq.h>
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#include "mlx4.h"
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#include "icm.h"
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#define MLX4_CQ_STATUS_OK ( 0 << 28)
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#define MLX4_CQ_STATUS_OVERFLOW ( 9 << 28)
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#define MLX4_CQ_STATUS_WRITE_FAIL (10 << 28)
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#define MLX4_CQ_FLAG_CC ( 1 << 18)
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#define MLX4_CQ_FLAG_OI ( 1 << 17)
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#define MLX4_CQ_STATE_ARMED ( 9 << 8)
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#define MLX4_CQ_STATE_ARMED_SOL ( 6 << 8)
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#define MLX4_EQ_STATE_FIRED (10 << 8)
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#define TASKLET_MAX_TIME 2
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#define TASKLET_MAX_TIME_JIFFIES msecs_to_jiffies(TASKLET_MAX_TIME)
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void mlx4_cq_tasklet_cb(struct tasklet_struct *t)
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{
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unsigned long flags;
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unsigned long end = jiffies + TASKLET_MAX_TIME_JIFFIES;
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struct mlx4_eq_tasklet *ctx = from_tasklet(ctx, t, task);
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struct mlx4_cq *mcq, *temp;
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spin_lock_irqsave(&ctx->lock, flags);
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list_splice_tail_init(&ctx->list, &ctx->process_list);
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spin_unlock_irqrestore(&ctx->lock, flags);
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list_for_each_entry_safe(mcq, temp, &ctx->process_list, tasklet_ctx.list) {
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list_del_init(&mcq->tasklet_ctx.list);
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mcq->tasklet_ctx.comp(mcq);
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if (refcount_dec_and_test(&mcq->refcount))
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complete(&mcq->free);
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if (time_after(jiffies, end))
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break;
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}
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if (!list_empty(&ctx->process_list))
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tasklet_schedule(&ctx->task);
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}
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static void mlx4_add_cq_to_tasklet(struct mlx4_cq *cq)
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{
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struct mlx4_eq_tasklet *tasklet_ctx = cq->tasklet_ctx.priv;
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unsigned long flags;
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bool kick;
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spin_lock_irqsave(&tasklet_ctx->lock, flags);
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/* When migrating CQs between EQs will be implemented, please note
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* that you need to sync this point. It is possible that
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* while migrating a CQ, completions on the old EQs could
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* still arrive.
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*/
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if (list_empty_careful(&cq->tasklet_ctx.list)) {
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refcount_inc(&cq->refcount);
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kick = list_empty(&tasklet_ctx->list);
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list_add_tail(&cq->tasklet_ctx.list, &tasklet_ctx->list);
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if (kick)
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tasklet_schedule(&tasklet_ctx->task);
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}
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spin_unlock_irqrestore(&tasklet_ctx->lock, flags);
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}
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void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn)
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{
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struct mlx4_cq *cq;
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rcu_read_lock();
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cq = radix_tree_lookup(&mlx4_priv(dev)->cq_table.tree,
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cqn & (dev->caps.num_cqs - 1));
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rcu_read_unlock();
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if (!cq) {
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mlx4_dbg(dev, "Completion event for bogus CQ %08x\n", cqn);
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return;
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}
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/* Acessing the CQ outside of rcu_read_lock is safe, because
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* the CQ is freed only after interrupt handling is completed.
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*/
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++cq->arm_sn;
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cq->comp(cq);
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}
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void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type)
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{
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struct mlx4_cq_table *cq_table = &mlx4_priv(dev)->cq_table;
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struct mlx4_cq *cq;
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rcu_read_lock();
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cq = radix_tree_lookup(&cq_table->tree, cqn & (dev->caps.num_cqs - 1));
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rcu_read_unlock();
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if (!cq) {
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mlx4_dbg(dev, "Async event for bogus CQ %08x\n", cqn);
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return;
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}
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/* Acessing the CQ outside of rcu_read_lock is safe, because
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* the CQ is freed only after interrupt handling is completed.
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*/
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cq->event(cq, event_type);
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}
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static int mlx4_SW2HW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
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int cq_num, u8 opmod)
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{
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return mlx4_cmd(dev, mailbox->dma, cq_num, opmod,
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MLX4_CMD_SW2HW_CQ, MLX4_CMD_TIME_CLASS_A,
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MLX4_CMD_WRAPPED);
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}
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static int mlx4_MODIFY_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
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int cq_num, u32 opmod)
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{
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return mlx4_cmd(dev, mailbox->dma, cq_num, opmod, MLX4_CMD_MODIFY_CQ,
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MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
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}
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static int mlx4_HW2SW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
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int cq_num)
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{
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return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0,
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cq_num, mailbox ? 0 : 1, MLX4_CMD_HW2SW_CQ,
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MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
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}
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int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq,
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u16 count, u16 period)
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{
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_cq_context *cq_context;
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int err;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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cq_context = mailbox->buf;
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cq_context->cq_max_count = cpu_to_be16(count);
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cq_context->cq_period = cpu_to_be16(period);
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err = mlx4_MODIFY_CQ(dev, mailbox, cq->cqn, 1);
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mlx4_free_cmd_mailbox(dev, mailbox);
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return err;
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}
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EXPORT_SYMBOL_GPL(mlx4_cq_modify);
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int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq,
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int entries, struct mlx4_mtt *mtt)
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{
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_cq_context *cq_context;
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u64 mtt_addr;
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int err;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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cq_context = mailbox->buf;
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cq_context->logsize_usrpage = cpu_to_be32(ilog2(entries) << 24);
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cq_context->log_page_size = mtt->page_shift - 12;
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mtt_addr = mlx4_mtt_addr(dev, mtt);
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cq_context->mtt_base_addr_h = mtt_addr >> 32;
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cq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff);
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err = mlx4_MODIFY_CQ(dev, mailbox, cq->cqn, 0);
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mlx4_free_cmd_mailbox(dev, mailbox);
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return err;
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}
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EXPORT_SYMBOL_GPL(mlx4_cq_resize);
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int __mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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struct mlx4_cq_table *cq_table = &priv->cq_table;
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int err;
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*cqn = mlx4_bitmap_alloc(&cq_table->bitmap);
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if (*cqn == -1)
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return -ENOMEM;
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err = mlx4_table_get(dev, &cq_table->table, *cqn);
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if (err)
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goto err_out;
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err = mlx4_table_get(dev, &cq_table->cmpt_table, *cqn);
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if (err)
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goto err_put;
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return 0;
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err_put:
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mlx4_table_put(dev, &cq_table->table, *cqn);
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err_out:
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mlx4_bitmap_free(&cq_table->bitmap, *cqn, MLX4_NO_RR);
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return err;
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}
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static int mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn, u8 usage)
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{
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u32 in_modifier = RES_CQ | (((u32)usage & 3) << 30);
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u64 out_param;
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int err;
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if (mlx4_is_mfunc(dev)) {
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err = mlx4_cmd_imm(dev, 0, &out_param, in_modifier,
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RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
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MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
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if (err)
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return err;
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else {
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*cqn = get_param_l(&out_param);
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return 0;
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}
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}
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return __mlx4_cq_alloc_icm(dev, cqn);
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}
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void __mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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struct mlx4_cq_table *cq_table = &priv->cq_table;
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mlx4_table_put(dev, &cq_table->cmpt_table, cqn);
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mlx4_table_put(dev, &cq_table->table, cqn);
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mlx4_bitmap_free(&cq_table->bitmap, cqn, MLX4_NO_RR);
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}
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static void mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn)
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{
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u64 in_param = 0;
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int err;
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if (mlx4_is_mfunc(dev)) {
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set_param_l(&in_param, cqn);
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err = mlx4_cmd(dev, in_param, RES_CQ, RES_OP_RESERVE_AND_MAP,
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MLX4_CMD_FREE_RES,
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MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
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if (err)
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mlx4_warn(dev, "Failed freeing cq:%d\n", cqn);
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} else
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__mlx4_cq_free_icm(dev, cqn);
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}
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static int mlx4_init_user_cqes(void *buf, int entries, int cqe_size)
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{
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int entries_per_copy = PAGE_SIZE / cqe_size;
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void *init_ents;
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int err = 0;
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int i;
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init_ents = kmalloc(PAGE_SIZE, GFP_KERNEL);
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if (!init_ents)
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return -ENOMEM;
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/* Populate a list of CQ entries to reduce the number of
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* copy_to_user calls. 0xcc is the initialization value
|
* required by the FW.
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*/
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memset(init_ents, 0xcc, PAGE_SIZE);
|
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if (entries_per_copy < entries) {
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for (i = 0; i < entries / entries_per_copy; i++) {
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err = copy_to_user((void __user *)buf, init_ents, PAGE_SIZE) ?
|
-EFAULT : 0;
|
if (err)
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goto out;
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buf += PAGE_SIZE;
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}
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} else {
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err = copy_to_user((void __user *)buf, init_ents, entries * cqe_size) ?
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-EFAULT : 0;
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}
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out:
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kfree(init_ents);
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|
return err;
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}
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static void mlx4_init_kernel_cqes(struct mlx4_buf *buf,
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int entries,
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int cqe_size)
|
{
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int i;
|
|
if (buf->nbufs == 1)
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memset(buf->direct.buf, 0xcc, entries * cqe_size);
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else
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for (i = 0; i < buf->npages; i++)
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memset(buf->page_list[i].buf, 0xcc,
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1UL << buf->page_shift);
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}
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int mlx4_cq_alloc(struct mlx4_dev *dev, int nent,
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struct mlx4_mtt *mtt, struct mlx4_uar *uar, u64 db_rec,
|
struct mlx4_cq *cq, unsigned vector, int collapsed,
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int timestamp_en, void *buf_addr, bool user_cq)
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{
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bool sw_cq_init = dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SW_CQ_INIT;
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struct mlx4_priv *priv = mlx4_priv(dev);
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struct mlx4_cq_table *cq_table = &priv->cq_table;
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struct mlx4_cmd_mailbox *mailbox;
|
struct mlx4_cq_context *cq_context;
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u64 mtt_addr;
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int err;
|
|
if (vector >= dev->caps.num_comp_vectors)
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return -EINVAL;
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cq->vector = vector;
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err = mlx4_cq_alloc_icm(dev, &cq->cqn, cq->usage);
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if (err)
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return err;
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spin_lock(&cq_table->lock);
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err = radix_tree_insert(&cq_table->tree, cq->cqn, cq);
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spin_unlock(&cq_table->lock);
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if (err)
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goto err_icm;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR(mailbox)) {
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err = PTR_ERR(mailbox);
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goto err_radix;
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}
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cq_context = mailbox->buf;
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cq_context->flags = cpu_to_be32(!!collapsed << 18);
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if (timestamp_en)
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cq_context->flags |= cpu_to_be32(1 << 19);
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cq_context->logsize_usrpage =
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cpu_to_be32((ilog2(nent) << 24) |
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mlx4_to_hw_uar_index(dev, uar->index));
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cq_context->comp_eqn = priv->eq_table.eq[MLX4_CQ_TO_EQ_VECTOR(vector)].eqn;
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cq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;
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mtt_addr = mlx4_mtt_addr(dev, mtt);
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cq_context->mtt_base_addr_h = mtt_addr >> 32;
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cq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff);
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cq_context->db_rec_addr = cpu_to_be64(db_rec);
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if (sw_cq_init) {
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if (user_cq) {
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err = mlx4_init_user_cqes(buf_addr, nent,
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dev->caps.cqe_size);
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if (err)
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sw_cq_init = false;
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} else {
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mlx4_init_kernel_cqes(buf_addr, nent,
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dev->caps.cqe_size);
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}
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}
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err = mlx4_SW2HW_CQ(dev, mailbox, cq->cqn, sw_cq_init);
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mlx4_free_cmd_mailbox(dev, mailbox);
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if (err)
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goto err_radix;
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cq->cons_index = 0;
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cq->arm_sn = 1;
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cq->uar = uar;
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refcount_set(&cq->refcount, 1);
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init_completion(&cq->free);
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cq->comp = mlx4_add_cq_to_tasklet;
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cq->tasklet_ctx.priv =
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&priv->eq_table.eq[MLX4_CQ_TO_EQ_VECTOR(vector)].tasklet_ctx;
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INIT_LIST_HEAD(&cq->tasklet_ctx.list);
|
|
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cq->irq = priv->eq_table.eq[MLX4_CQ_TO_EQ_VECTOR(vector)].irq;
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return 0;
|
|
err_radix:
|
spin_lock(&cq_table->lock);
|
radix_tree_delete(&cq_table->tree, cq->cqn);
|
spin_unlock(&cq_table->lock);
|
|
err_icm:
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mlx4_cq_free_icm(dev, cq->cqn);
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|
return err;
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}
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EXPORT_SYMBOL_GPL(mlx4_cq_alloc);
|
|
void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq)
|
{
|
struct mlx4_priv *priv = mlx4_priv(dev);
|
struct mlx4_cq_table *cq_table = &priv->cq_table;
|
int err;
|
|
err = mlx4_HW2SW_CQ(dev, NULL, cq->cqn);
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if (err)
|
mlx4_warn(dev, "HW2SW_CQ failed (%d) for CQN %06x\n", err, cq->cqn);
|
|
spin_lock(&cq_table->lock);
|
radix_tree_delete(&cq_table->tree, cq->cqn);
|
spin_unlock(&cq_table->lock);
|
|
synchronize_irq(priv->eq_table.eq[MLX4_CQ_TO_EQ_VECTOR(cq->vector)].irq);
|
if (priv->eq_table.eq[MLX4_CQ_TO_EQ_VECTOR(cq->vector)].irq !=
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priv->eq_table.eq[MLX4_EQ_ASYNC].irq)
|
synchronize_irq(priv->eq_table.eq[MLX4_EQ_ASYNC].irq);
|
|
if (refcount_dec_and_test(&cq->refcount))
|
complete(&cq->free);
|
wait_for_completion(&cq->free);
|
|
mlx4_cq_free_icm(dev, cq->cqn);
|
}
|
EXPORT_SYMBOL_GPL(mlx4_cq_free);
|
|
int mlx4_init_cq_table(struct mlx4_dev *dev)
|
{
|
struct mlx4_cq_table *cq_table = &mlx4_priv(dev)->cq_table;
|
int err;
|
|
spin_lock_init(&cq_table->lock);
|
INIT_RADIX_TREE(&cq_table->tree, GFP_ATOMIC);
|
if (mlx4_is_slave(dev))
|
return 0;
|
|
err = mlx4_bitmap_init(&cq_table->bitmap, dev->caps.num_cqs,
|
dev->caps.num_cqs - 1, dev->caps.reserved_cqs, 0);
|
if (err)
|
return err;
|
|
return 0;
|
}
|
|
void mlx4_cleanup_cq_table(struct mlx4_dev *dev)
|
{
|
if (mlx4_is_slave(dev))
|
return;
|
/* Nothing to do to clean up radix_tree */
|
mlx4_bitmap_cleanup(&mlx4_priv(dev)->cq_table.bitmap);
|
}
|
