// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* drivers/net/ethernet/ibm/emac/rgmii.c
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*
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* Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
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*
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* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
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* <benh@kernel.crashing.org>
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*
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* Based on the arch/ppc version of the driver:
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*
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* Copyright (c) 2004, 2005 Zultys Technologies.
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* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
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*
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* Based on original work by
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* Matt Porter <mporter@kernel.crashing.org>
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* Copyright 2004 MontaVista Software, Inc.
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*/
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#include <linux/slab.h>
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#include <linux/kernel.h>
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#include <linux/ethtool.h>
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#include <linux/of_address.h>
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#include <asm/io.h>
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#include "emac.h"
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#include "debug.h"
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// XXX FIXME: Axon seems to support a subset of the RGMII, we
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// thus need to take that into account and possibly change some
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// of the bit settings below that don't seem to quite match the
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// AXON spec
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/* RGMIIx_FER */
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#define RGMII_FER_MASK(idx) (0x7 << ((idx) * 4))
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#define RGMII_FER_RTBI(idx) (0x4 << ((idx) * 4))
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#define RGMII_FER_RGMII(idx) (0x5 << ((idx) * 4))
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#define RGMII_FER_TBI(idx) (0x6 << ((idx) * 4))
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#define RGMII_FER_GMII(idx) (0x7 << ((idx) * 4))
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#define RGMII_FER_MII(idx) RGMII_FER_GMII(idx)
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/* RGMIIx_SSR */
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#define RGMII_SSR_MASK(idx) (0x7 << ((idx) * 8))
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#define RGMII_SSR_10(idx) (0x1 << ((idx) * 8))
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#define RGMII_SSR_100(idx) (0x2 << ((idx) * 8))
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#define RGMII_SSR_1000(idx) (0x4 << ((idx) * 8))
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/* RGMII bridge supports only GMII/TBI and RGMII/RTBI PHYs */
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static inline int rgmii_valid_mode(int phy_mode)
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{
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return phy_interface_mode_is_rgmii(phy_mode) ||
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phy_mode == PHY_INTERFACE_MODE_GMII ||
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phy_mode == PHY_INTERFACE_MODE_MII ||
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phy_mode == PHY_INTERFACE_MODE_TBI ||
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phy_mode == PHY_INTERFACE_MODE_RTBI;
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}
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static inline u32 rgmii_mode_mask(int mode, int input)
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{
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switch (mode) {
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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return RGMII_FER_RGMII(input);
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case PHY_INTERFACE_MODE_TBI:
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return RGMII_FER_TBI(input);
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case PHY_INTERFACE_MODE_GMII:
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return RGMII_FER_GMII(input);
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case PHY_INTERFACE_MODE_MII:
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return RGMII_FER_MII(input);
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case PHY_INTERFACE_MODE_RTBI:
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return RGMII_FER_RTBI(input);
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default:
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BUG();
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}
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}
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int rgmii_attach(struct platform_device *ofdev, int input, int mode)
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{
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struct rgmii_instance *dev = platform_get_drvdata(ofdev);
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struct rgmii_regs __iomem *p = dev->base;
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RGMII_DBG(dev, "attach(%d)" NL, input);
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/* Check if we need to attach to a RGMII */
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if (input < 0 || !rgmii_valid_mode(mode)) {
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printk(KERN_ERR "%pOF: unsupported settings !\n",
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ofdev->dev.of_node);
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return -ENODEV;
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}
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mutex_lock(&dev->lock);
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/* Enable this input */
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out_be32(&p->fer, in_be32(&p->fer) | rgmii_mode_mask(mode, input));
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printk(KERN_NOTICE "%pOF: input %d in %s mode\n",
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ofdev->dev.of_node, input, phy_modes(mode));
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++dev->users;
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mutex_unlock(&dev->lock);
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return 0;
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}
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void rgmii_set_speed(struct platform_device *ofdev, int input, int speed)
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{
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struct rgmii_instance *dev = platform_get_drvdata(ofdev);
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struct rgmii_regs __iomem *p = dev->base;
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u32 ssr;
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mutex_lock(&dev->lock);
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ssr = in_be32(&p->ssr) & ~RGMII_SSR_MASK(input);
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RGMII_DBG(dev, "speed(%d, %d)" NL, input, speed);
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if (speed == SPEED_1000)
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ssr |= RGMII_SSR_1000(input);
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else if (speed == SPEED_100)
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ssr |= RGMII_SSR_100(input);
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else if (speed == SPEED_10)
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ssr |= RGMII_SSR_10(input);
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out_be32(&p->ssr, ssr);
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mutex_unlock(&dev->lock);
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}
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void rgmii_get_mdio(struct platform_device *ofdev, int input)
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{
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struct rgmii_instance *dev = platform_get_drvdata(ofdev);
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struct rgmii_regs __iomem *p = dev->base;
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u32 fer;
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RGMII_DBG2(dev, "get_mdio(%d)" NL, input);
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if (!(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO))
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return;
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mutex_lock(&dev->lock);
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fer = in_be32(&p->fer);
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fer |= 0x00080000u >> input;
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out_be32(&p->fer, fer);
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(void)in_be32(&p->fer);
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DBG2(dev, " fer = 0x%08x\n", fer);
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}
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void rgmii_put_mdio(struct platform_device *ofdev, int input)
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{
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struct rgmii_instance *dev = platform_get_drvdata(ofdev);
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struct rgmii_regs __iomem *p = dev->base;
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u32 fer;
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RGMII_DBG2(dev, "put_mdio(%d)" NL, input);
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if (!(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO))
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return;
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fer = in_be32(&p->fer);
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fer &= ~(0x00080000u >> input);
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out_be32(&p->fer, fer);
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(void)in_be32(&p->fer);
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DBG2(dev, " fer = 0x%08x\n", fer);
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mutex_unlock(&dev->lock);
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}
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void rgmii_detach(struct platform_device *ofdev, int input)
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{
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struct rgmii_instance *dev = platform_get_drvdata(ofdev);
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struct rgmii_regs __iomem *p;
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BUG_ON(!dev || dev->users == 0);
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p = dev->base;
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mutex_lock(&dev->lock);
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RGMII_DBG(dev, "detach(%d)" NL, input);
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/* Disable this input */
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out_be32(&p->fer, in_be32(&p->fer) & ~RGMII_FER_MASK(input));
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--dev->users;
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mutex_unlock(&dev->lock);
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}
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int rgmii_get_regs_len(struct platform_device *ofdev)
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{
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return sizeof(struct emac_ethtool_regs_subhdr) +
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sizeof(struct rgmii_regs);
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}
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void *rgmii_dump_regs(struct platform_device *ofdev, void *buf)
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{
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struct rgmii_instance *dev = platform_get_drvdata(ofdev);
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struct emac_ethtool_regs_subhdr *hdr = buf;
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struct rgmii_regs *regs = (struct rgmii_regs *)(hdr + 1);
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hdr->version = 0;
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hdr->index = 0; /* for now, are there chips with more than one
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* rgmii ? if yes, then we'll add a cell_index
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* like we do for emac
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*/
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memcpy_fromio(regs, dev->base, sizeof(struct rgmii_regs));
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return regs + 1;
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}
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static int rgmii_probe(struct platform_device *ofdev)
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{
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struct device_node *np = ofdev->dev.of_node;
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struct rgmii_instance *dev;
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struct resource regs;
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int rc;
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rc = -ENOMEM;
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dev = kzalloc(sizeof(struct rgmii_instance), GFP_KERNEL);
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if (dev == NULL)
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goto err_gone;
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mutex_init(&dev->lock);
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dev->ofdev = ofdev;
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rc = -ENXIO;
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if (of_address_to_resource(np, 0, ®s)) {
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printk(KERN_ERR "%pOF: Can't get registers address\n", np);
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goto err_free;
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}
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rc = -ENOMEM;
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dev->base = (struct rgmii_regs __iomem *)ioremap(regs.start,
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sizeof(struct rgmii_regs));
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if (dev->base == NULL) {
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printk(KERN_ERR "%pOF: Can't map device registers!\n", np);
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goto err_free;
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}
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/* Check for RGMII flags */
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if (of_get_property(ofdev->dev.of_node, "has-mdio", NULL))
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dev->flags |= EMAC_RGMII_FLAG_HAS_MDIO;
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/* CAB lacks the right properties, fix this up */
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if (of_device_is_compatible(ofdev->dev.of_node, "ibm,rgmii-axon"))
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dev->flags |= EMAC_RGMII_FLAG_HAS_MDIO;
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DBG2(dev, " Boot FER = 0x%08x, SSR = 0x%08x\n",
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in_be32(&dev->base->fer), in_be32(&dev->base->ssr));
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/* Disable all inputs by default */
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out_be32(&dev->base->fer, 0);
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printk(KERN_INFO
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"RGMII %pOF initialized with%s MDIO support\n",
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ofdev->dev.of_node,
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(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO) ? "" : "out");
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wmb();
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platform_set_drvdata(ofdev, dev);
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return 0;
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err_free:
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kfree(dev);
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err_gone:
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return rc;
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}
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static int rgmii_remove(struct platform_device *ofdev)
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{
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struct rgmii_instance *dev = platform_get_drvdata(ofdev);
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WARN_ON(dev->users != 0);
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iounmap(dev->base);
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kfree(dev);
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return 0;
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}
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static const struct of_device_id rgmii_match[] =
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{
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{
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.compatible = "ibm,rgmii",
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},
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{
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.type = "emac-rgmii",
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},
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{},
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};
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static struct platform_driver rgmii_driver = {
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.driver = {
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.name = "emac-rgmii",
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.of_match_table = rgmii_match,
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},
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.probe = rgmii_probe,
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.remove = rgmii_remove,
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};
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int __init rgmii_init(void)
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{
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return platform_driver_register(&rgmii_driver);
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}
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void rgmii_exit(void)
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{
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platform_driver_unregister(&rgmii_driver);
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}
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