/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* drivers/net/ethernet/ibm/emac/phy.h
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*
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* Driver for PowerPC 4xx on-chip ethernet controller, PHY support
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*
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* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
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* <benh@kernel.crashing.org>
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*
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* Based on the arch/ppc version of the driver:
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*
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* Benjamin Herrenschmidt <benh@kernel.crashing.org>
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* February 2003
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*
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* Minor additions by Eugene Surovegin <ebs@ebshome.net>, 2004
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*
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* This file basically duplicates sungem_phy.{c,h} with different PHYs
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* supported. I'm looking into merging that in a single mii layer more
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* flexible than mii.c
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*/
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#ifndef __IBM_NEWEMAC_PHY_H
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#define __IBM_NEWEMAC_PHY_H
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struct mii_phy;
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/* Operations supported by any kind of PHY */
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struct mii_phy_ops {
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int (*init) (struct mii_phy * phy);
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int (*suspend) (struct mii_phy * phy, int wol_options);
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int (*setup_aneg) (struct mii_phy * phy, u32 advertise);
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int (*setup_forced) (struct mii_phy * phy, int speed, int fd);
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int (*poll_link) (struct mii_phy * phy);
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int (*read_link) (struct mii_phy * phy);
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};
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/* Structure used to statically define an mii/gii based PHY */
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struct mii_phy_def {
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u32 phy_id; /* Concatenated ID1 << 16 | ID2 */
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u32 phy_id_mask; /* Significant bits */
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u32 features; /* Ethtool SUPPORTED_* defines or
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0 for autodetect */
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int magic_aneg; /* Autoneg does all speed test for us */
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const char *name;
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const struct mii_phy_ops *ops;
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};
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/* An instance of a PHY, partially borrowed from mii_if_info */
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struct mii_phy {
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struct mii_phy_def *def;
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u32 advertising; /* Ethtool ADVERTISED_* defines */
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u32 features; /* Copied from mii_phy_def.features
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or determined automaticaly */
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int address; /* PHY address */
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int mode; /* PHY mode */
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int gpcs_address; /* GPCS PHY address */
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/* 1: autoneg enabled, 0: disabled */
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int autoneg;
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/* forced speed & duplex (no autoneg)
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* partner speed & duplex & pause (autoneg)
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*/
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int speed;
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int duplex;
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int pause;
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int asym_pause;
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/* Provided by host chip */
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struct net_device *dev;
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int (*mdio_read) (struct net_device * dev, int addr, int reg);
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void (*mdio_write) (struct net_device * dev, int addr, int reg,
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int val);
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};
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/* Pass in a struct mii_phy with dev, mdio_read and mdio_write
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* filled, the remaining fields will be filled on return
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*/
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int emac_mii_phy_probe(struct mii_phy *phy, int address);
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int emac_mii_reset_phy(struct mii_phy *phy);
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int emac_mii_reset_gpcs(struct mii_phy *phy);
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#endif /* __IBM_NEWEMAC_PHY_H */
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