/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* linux/drivers/net/ethernet/ibm/ehea/ehea_qmr.h
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*
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* eHEA ethernet device driver for IBM eServer System p
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*
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* (C) Copyright IBM Corp. 2006
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*
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* Authors:
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* Christoph Raisch <raisch@de.ibm.com>
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* Jan-Bernd Themann <themann@de.ibm.com>
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* Thomas Klein <tklein@de.ibm.com>
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*/
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#ifndef __EHEA_QMR_H__
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#define __EHEA_QMR_H__
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#include <linux/prefetch.h>
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#include "ehea.h"
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#include "ehea_hw.h"
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/*
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* page size of ehea hardware queues
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*/
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#define EHEA_PAGESHIFT 12
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#define EHEA_PAGESIZE (1UL << EHEA_PAGESHIFT)
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#define EHEA_SECTSIZE (1UL << 24)
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#define EHEA_PAGES_PER_SECTION (EHEA_SECTSIZE >> EHEA_PAGESHIFT)
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#define EHEA_HUGEPAGESHIFT 34
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#define EHEA_HUGEPAGE_SIZE (1UL << EHEA_HUGEPAGESHIFT)
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#define EHEA_HUGEPAGE_PFN_MASK ((EHEA_HUGEPAGE_SIZE - 1) >> PAGE_SHIFT)
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#if ((1UL << SECTION_SIZE_BITS) < EHEA_SECTSIZE)
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#error eHEA module cannot work if kernel sectionsize < ehea sectionsize
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#endif
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/* Some abbreviations used here:
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*
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* WQE - Work Queue Entry
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* SWQE - Send Work Queue Entry
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* RWQE - Receive Work Queue Entry
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* CQE - Completion Queue Entry
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* EQE - Event Queue Entry
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* MR - Memory Region
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*/
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/* Use of WR_ID field for EHEA */
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#define EHEA_WR_ID_COUNT EHEA_BMASK_IBM(0, 19)
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#define EHEA_WR_ID_TYPE EHEA_BMASK_IBM(20, 23)
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#define EHEA_SWQE2_TYPE 0x1
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#define EHEA_SWQE3_TYPE 0x2
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#define EHEA_RWQE2_TYPE 0x3
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#define EHEA_RWQE3_TYPE 0x4
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#define EHEA_WR_ID_INDEX EHEA_BMASK_IBM(24, 47)
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#define EHEA_WR_ID_REFILL EHEA_BMASK_IBM(48, 63)
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struct ehea_vsgentry {
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u64 vaddr;
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u32 l_key;
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u32 len;
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};
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/* maximum number of sg entries allowed in a WQE */
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#define EHEA_MAX_WQE_SG_ENTRIES 252
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#define SWQE2_MAX_IMM (0xD0 - 0x30)
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#define SWQE3_MAX_IMM 224
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/* tx control flags for swqe */
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#define EHEA_SWQE_CRC 0x8000
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#define EHEA_SWQE_IP_CHECKSUM 0x4000
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#define EHEA_SWQE_TCP_CHECKSUM 0x2000
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#define EHEA_SWQE_TSO 0x1000
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#define EHEA_SWQE_SIGNALLED_COMPLETION 0x0800
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#define EHEA_SWQE_VLAN_INSERT 0x0400
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#define EHEA_SWQE_IMM_DATA_PRESENT 0x0200
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#define EHEA_SWQE_DESCRIPTORS_PRESENT 0x0100
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#define EHEA_SWQE_WRAP_CTL_REC 0x0080
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#define EHEA_SWQE_WRAP_CTL_FORCE 0x0040
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#define EHEA_SWQE_BIND 0x0020
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#define EHEA_SWQE_PURGE 0x0010
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/* sizeof(struct ehea_swqe) less the union */
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#define SWQE_HEADER_SIZE 32
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struct ehea_swqe {
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u64 wr_id;
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u16 tx_control;
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u16 vlan_tag;
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u8 reserved1;
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u8 ip_start;
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u8 ip_end;
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u8 immediate_data_length;
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u8 tcp_offset;
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u8 reserved2;
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u16 reserved2b;
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u8 wrap_tag;
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u8 descriptors; /* number of valid descriptors in WQE */
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u16 reserved3;
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u16 reserved4;
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u16 mss;
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u32 reserved5;
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union {
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/* Send WQE Format 1 */
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struct {
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struct ehea_vsgentry sg_list[EHEA_MAX_WQE_SG_ENTRIES];
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} no_immediate_data;
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/* Send WQE Format 2 */
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struct {
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struct ehea_vsgentry sg_entry;
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/* 0x30 */
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u8 immediate_data[SWQE2_MAX_IMM];
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/* 0xd0 */
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struct ehea_vsgentry sg_list[EHEA_MAX_WQE_SG_ENTRIES-1];
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} immdata_desc __packed;
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/* Send WQE Format 3 */
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struct {
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u8 immediate_data[SWQE3_MAX_IMM];
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} immdata_nodesc;
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} u;
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};
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struct ehea_rwqe {
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u64 wr_id; /* work request ID */
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u8 reserved1[5];
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u8 data_segments;
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u16 reserved2;
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u64 reserved3;
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u64 reserved4;
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struct ehea_vsgentry sg_list[EHEA_MAX_WQE_SG_ENTRIES];
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};
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#define EHEA_CQE_VLAN_TAG_XTRACT 0x0400
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#define EHEA_CQE_TYPE_RQ 0x60
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#define EHEA_CQE_STAT_ERR_MASK 0x700F
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#define EHEA_CQE_STAT_FAT_ERR_MASK 0xF
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#define EHEA_CQE_BLIND_CKSUM 0x8000
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#define EHEA_CQE_STAT_ERR_TCP 0x4000
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#define EHEA_CQE_STAT_ERR_IP 0x2000
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#define EHEA_CQE_STAT_ERR_CRC 0x1000
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/* Defines which bad send cqe stati lead to a port reset */
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#define EHEA_CQE_STAT_RESET_MASK 0x0002
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struct ehea_cqe {
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u64 wr_id; /* work request ID from WQE */
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u8 type;
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u8 valid;
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u16 status;
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u16 reserved1;
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u16 num_bytes_transfered;
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u16 vlan_tag;
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u16 inet_checksum_value;
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u8 reserved2;
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u8 header_length;
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u16 reserved3;
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u16 page_offset;
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u16 wqe_count;
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u32 qp_token;
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u32 timestamp;
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u32 reserved4;
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u64 reserved5[3];
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};
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#define EHEA_EQE_VALID EHEA_BMASK_IBM(0, 0)
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#define EHEA_EQE_IS_CQE EHEA_BMASK_IBM(1, 1)
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#define EHEA_EQE_IDENTIFIER EHEA_BMASK_IBM(2, 7)
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#define EHEA_EQE_QP_CQ_NUMBER EHEA_BMASK_IBM(8, 31)
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#define EHEA_EQE_QP_TOKEN EHEA_BMASK_IBM(32, 63)
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#define EHEA_EQE_CQ_TOKEN EHEA_BMASK_IBM(32, 63)
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#define EHEA_EQE_KEY EHEA_BMASK_IBM(32, 63)
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#define EHEA_EQE_PORT_NUMBER EHEA_BMASK_IBM(56, 63)
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#define EHEA_EQE_EQ_NUMBER EHEA_BMASK_IBM(48, 63)
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#define EHEA_EQE_SM_ID EHEA_BMASK_IBM(48, 63)
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#define EHEA_EQE_SM_MECH_NUMBER EHEA_BMASK_IBM(48, 55)
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#define EHEA_EQE_SM_PORT_NUMBER EHEA_BMASK_IBM(56, 63)
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#define EHEA_AER_RESTYPE_QP 0x8
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#define EHEA_AER_RESTYPE_CQ 0x4
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#define EHEA_AER_RESTYPE_EQ 0x3
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/* Defines which affiliated errors lead to a port reset */
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#define EHEA_AER_RESET_MASK 0xFFFFFFFFFEFFFFFFULL
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#define EHEA_AERR_RESET_MASK 0xFFFFFFFFFFFFFFFFULL
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struct ehea_eqe {
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u64 entry;
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};
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#define ERROR_DATA_LENGTH EHEA_BMASK_IBM(52, 63)
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#define ERROR_DATA_TYPE EHEA_BMASK_IBM(0, 7)
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static inline void *hw_qeit_calc(struct hw_queue *queue, u64 q_offset)
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{
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struct ehea_page *current_page;
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if (q_offset >= queue->queue_length)
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q_offset -= queue->queue_length;
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current_page = (queue->queue_pages)[q_offset >> EHEA_PAGESHIFT];
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return ¤t_page->entries[q_offset & (EHEA_PAGESIZE - 1)];
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}
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static inline void *hw_qeit_get(struct hw_queue *queue)
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{
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return hw_qeit_calc(queue, queue->current_q_offset);
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}
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static inline void hw_qeit_inc(struct hw_queue *queue)
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{
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queue->current_q_offset += queue->qe_size;
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if (queue->current_q_offset >= queue->queue_length) {
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queue->current_q_offset = 0;
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/* toggle the valid flag */
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queue->toggle_state = (~queue->toggle_state) & 1;
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}
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}
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static inline void *hw_qeit_get_inc(struct hw_queue *queue)
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{
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void *retvalue = hw_qeit_get(queue);
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hw_qeit_inc(queue);
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return retvalue;
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}
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static inline void *hw_qeit_get_inc_valid(struct hw_queue *queue)
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{
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struct ehea_cqe *retvalue = hw_qeit_get(queue);
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u8 valid = retvalue->valid;
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void *pref;
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if ((valid >> 7) == (queue->toggle_state & 1)) {
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/* this is a good one */
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hw_qeit_inc(queue);
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pref = hw_qeit_calc(queue, queue->current_q_offset);
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prefetch(pref);
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prefetch(pref + 128);
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} else
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retvalue = NULL;
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return retvalue;
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}
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static inline void *hw_qeit_get_valid(struct hw_queue *queue)
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{
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struct ehea_cqe *retvalue = hw_qeit_get(queue);
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void *pref;
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u8 valid;
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pref = hw_qeit_calc(queue, queue->current_q_offset);
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prefetch(pref);
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prefetch(pref + 128);
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prefetch(pref + 256);
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valid = retvalue->valid;
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if (!((valid >> 7) == (queue->toggle_state & 1)))
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retvalue = NULL;
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return retvalue;
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}
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static inline void *hw_qeit_reset(struct hw_queue *queue)
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{
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queue->current_q_offset = 0;
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return hw_qeit_get(queue);
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}
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static inline void *hw_qeit_eq_get_inc(struct hw_queue *queue)
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{
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u64 last_entry_in_q = queue->queue_length - queue->qe_size;
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void *retvalue;
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retvalue = hw_qeit_get(queue);
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queue->current_q_offset += queue->qe_size;
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if (queue->current_q_offset > last_entry_in_q) {
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queue->current_q_offset = 0;
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queue->toggle_state = (~queue->toggle_state) & 1;
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}
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return retvalue;
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}
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static inline void *hw_eqit_eq_get_inc_valid(struct hw_queue *queue)
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{
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void *retvalue = hw_qeit_get(queue);
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u32 qe = *(u8 *)retvalue;
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if ((qe >> 7) == (queue->toggle_state & 1))
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hw_qeit_eq_get_inc(queue);
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else
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retvalue = NULL;
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return retvalue;
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}
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static inline struct ehea_rwqe *ehea_get_next_rwqe(struct ehea_qp *qp,
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int rq_nr)
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{
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struct hw_queue *queue;
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if (rq_nr == 1)
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queue = &qp->hw_rqueue1;
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else if (rq_nr == 2)
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queue = &qp->hw_rqueue2;
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else
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queue = &qp->hw_rqueue3;
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return hw_qeit_get_inc(queue);
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}
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static inline struct ehea_swqe *ehea_get_swqe(struct ehea_qp *my_qp,
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int *wqe_index)
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{
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struct hw_queue *queue = &my_qp->hw_squeue;
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struct ehea_swqe *wqe_p;
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*wqe_index = (queue->current_q_offset) >> (7 + EHEA_SG_SQ);
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wqe_p = hw_qeit_get_inc(&my_qp->hw_squeue);
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return wqe_p;
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}
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static inline void ehea_post_swqe(struct ehea_qp *my_qp, struct ehea_swqe *swqe)
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{
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iosync();
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ehea_update_sqa(my_qp, 1);
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}
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static inline struct ehea_cqe *ehea_poll_rq1(struct ehea_qp *qp, int *wqe_index)
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{
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struct hw_queue *queue = &qp->hw_rqueue1;
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*wqe_index = (queue->current_q_offset) >> (7 + EHEA_SG_RQ1);
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return hw_qeit_get_valid(queue);
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}
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static inline void ehea_inc_cq(struct ehea_cq *cq)
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{
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hw_qeit_inc(&cq->hw_queue);
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}
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static inline void ehea_inc_rq1(struct ehea_qp *qp)
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{
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hw_qeit_inc(&qp->hw_rqueue1);
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}
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static inline struct ehea_cqe *ehea_poll_cq(struct ehea_cq *my_cq)
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{
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return hw_qeit_get_valid(&my_cq->hw_queue);
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}
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#define EHEA_CQ_REGISTER_ORIG 0
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#define EHEA_EQ_REGISTER_ORIG 0
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enum ehea_eq_type {
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EHEA_EQ = 0, /* event queue */
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EHEA_NEQ /* notification event queue */
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};
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struct ehea_eq *ehea_create_eq(struct ehea_adapter *adapter,
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enum ehea_eq_type type,
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const u32 length, const u8 eqe_gen);
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int ehea_destroy_eq(struct ehea_eq *eq);
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struct ehea_eqe *ehea_poll_eq(struct ehea_eq *eq);
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struct ehea_cq *ehea_create_cq(struct ehea_adapter *adapter, int cqe,
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u64 eq_handle, u32 cq_token);
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int ehea_destroy_cq(struct ehea_cq *cq);
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struct ehea_qp *ehea_create_qp(struct ehea_adapter *adapter, u32 pd,
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struct ehea_qp_init_attr *init_attr);
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int ehea_destroy_qp(struct ehea_qp *qp);
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int ehea_reg_kernel_mr(struct ehea_adapter *adapter, struct ehea_mr *mr);
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int ehea_gen_smr(struct ehea_adapter *adapter, struct ehea_mr *old_mr,
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struct ehea_mr *shared_mr);
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int ehea_rem_mr(struct ehea_mr *mr);
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u64 ehea_error_data(struct ehea_adapter *adapter, u64 res_handle,
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u64 *aer, u64 *aerr);
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int ehea_add_sect_bmap(unsigned long pfn, unsigned long nr_pages);
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int ehea_rem_sect_bmap(unsigned long pfn, unsigned long nr_pages);
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int ehea_create_busmap(void);
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void ehea_destroy_busmap(void);
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u64 ehea_map_vaddr(void *caddr);
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#endif /* __EHEA_QMR_H__ */
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