/*****************************************************************************
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* *
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* File: cphy.h *
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* $Revision: 1.7 $ *
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* $Date: 2005/06/21 18:29:47 $ *
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* Description: *
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* part of the Chelsio 10Gb Ethernet Driver. *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License, version 2, as *
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* published by the Free Software Foundation. *
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* *
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* You should have received a copy of the GNU General Public License along *
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* with this program; if not, see <http://www.gnu.org/licenses/>. *
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* *
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED *
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* WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF *
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
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* *
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* http://www.chelsio.com *
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* *
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* Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
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* All rights reserved. *
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* *
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* Maintainers: maintainers@chelsio.com *
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* *
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* Authors: Dimitrios Michailidis <dm@chelsio.com> *
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* Tina Yang <tainay@chelsio.com> *
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* Felix Marti <felix@chelsio.com> *
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* Scott Bardone <sbardone@chelsio.com> *
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* Kurt Ottaway <kottaway@chelsio.com> *
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* Frank DiMambro <frank@chelsio.com> *
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* *
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* History: *
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* *
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****************************************************************************/
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#ifndef _CXGB_CPHY_H_
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#define _CXGB_CPHY_H_
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#include "common.h"
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struct mdio_ops {
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void (*init)(adapter_t *adapter, const struct board_info *bi);
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int (*read)(struct net_device *dev, int phy_addr, int mmd_addr,
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u16 reg_addr);
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int (*write)(struct net_device *dev, int phy_addr, int mmd_addr,
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u16 reg_addr, u16 val);
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unsigned mode_support;
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};
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/* PHY interrupt types */
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enum {
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cphy_cause_link_change = 0x1,
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cphy_cause_error = 0x2,
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cphy_cause_fifo_error = 0x3
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};
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enum {
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PHY_LINK_UP = 0x1,
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PHY_AUTONEG_RDY = 0x2,
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PHY_AUTONEG_EN = 0x4
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};
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struct cphy;
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/* PHY operations */
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struct cphy_ops {
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void (*destroy)(struct cphy *);
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int (*reset)(struct cphy *, int wait);
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int (*interrupt_enable)(struct cphy *);
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int (*interrupt_disable)(struct cphy *);
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int (*interrupt_clear)(struct cphy *);
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int (*interrupt_handler)(struct cphy *);
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int (*autoneg_enable)(struct cphy *);
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int (*autoneg_disable)(struct cphy *);
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int (*autoneg_restart)(struct cphy *);
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int (*advertise)(struct cphy *phy, unsigned int advertise_map);
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int (*set_loopback)(struct cphy *, int on);
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int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
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int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
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int *duplex, int *fc);
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u32 mmds;
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};
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/* A PHY instance */
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struct cphy {
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int state; /* Link status state machine */
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adapter_t *adapter; /* associated adapter */
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struct delayed_work phy_update;
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u16 bmsr;
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int count;
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int act_count;
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int act_on;
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u32 elmer_gpo;
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const struct cphy_ops *ops; /* PHY operations */
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struct mdio_if_info mdio;
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struct cphy_instance *instance;
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};
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/* Convenience MDIO read/write wrappers */
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static inline int cphy_mdio_read(struct cphy *cphy, int mmd, int reg,
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unsigned int *valp)
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{
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int rc = cphy->mdio.mdio_read(cphy->mdio.dev, cphy->mdio.prtad, mmd,
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reg);
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*valp = (rc >= 0) ? rc : -1;
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return (rc >= 0) ? 0 : rc;
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}
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static inline int cphy_mdio_write(struct cphy *cphy, int mmd, int reg,
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unsigned int val)
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{
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return cphy->mdio.mdio_write(cphy->mdio.dev, cphy->mdio.prtad, mmd,
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reg, val);
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}
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static inline int simple_mdio_read(struct cphy *cphy, int reg,
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unsigned int *valp)
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{
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return cphy_mdio_read(cphy, MDIO_DEVAD_NONE, reg, valp);
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}
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static inline int simple_mdio_write(struct cphy *cphy, int reg,
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unsigned int val)
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{
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return cphy_mdio_write(cphy, MDIO_DEVAD_NONE, reg, val);
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}
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/* Convenience initializer */
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static inline void cphy_init(struct cphy *phy, struct net_device *dev,
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int phy_addr, const struct cphy_ops *phy_ops,
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const struct mdio_ops *mdio_ops)
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{
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struct adapter *adapter = netdev_priv(dev);
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phy->adapter = adapter;
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phy->ops = phy_ops;
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if (mdio_ops) {
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phy->mdio.prtad = phy_addr;
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phy->mdio.mmds = phy_ops->mmds;
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phy->mdio.mode_support = mdio_ops->mode_support;
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phy->mdio.mdio_read = mdio_ops->read;
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phy->mdio.mdio_write = mdio_ops->write;
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}
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phy->mdio.dev = dev;
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}
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/* Operations of the PHY-instance factory */
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struct gphy {
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/* Construct a PHY instance with the given PHY address */
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struct cphy *(*create)(struct net_device *dev, int phy_addr,
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const struct mdio_ops *mdio_ops);
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/*
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* Reset the PHY chip. This resets the whole PHY chip, not individual
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* ports.
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*/
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int (*reset)(adapter_t *adapter);
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};
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extern const struct gphy t1_my3126_ops;
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extern const struct gphy t1_mv88e1xxx_ops;
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extern const struct gphy t1_vsc8244_ops;
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extern const struct gphy t1_mv88x201x_ops;
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#endif /* _CXGB_CPHY_H_ */
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