/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Xilinx Video Timing Controller
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*
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* Copyright (C) 2013-2015 Ideas on Board
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* Copyright (C) 2013-2015 Xilinx, Inc.
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*
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* Contacts: Hyun Kwon <hyun.kwon@xilinx.com>
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* Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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*/
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#ifndef __XILINX_VTC_H__
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#define __XILINX_VTC_H__
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struct device_node;
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struct xvtc_device;
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#define XVTC_MAX_HSIZE 8191
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#define XVTC_MAX_VSIZE 8191
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struct xvtc_config {
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unsigned int hblank_start;
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unsigned int hsync_start;
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unsigned int hsync_end;
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unsigned int hsize;
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unsigned int vblank_start;
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unsigned int vsync_start;
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unsigned int vsync_end;
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unsigned int vsize;
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};
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struct xvtc_device *xvtc_of_get(struct device_node *np);
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void xvtc_put(struct xvtc_device *xvtc);
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int xvtc_generator_start(struct xvtc_device *xvtc,
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const struct xvtc_config *config);
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int xvtc_generator_stop(struct xvtc_device *xvtc);
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#endif /* __XILINX_VTC_H__ */
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