// SPDX-License-Identifier: GPL-2.0+
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/*
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* vsp1_rpf.c -- R-Car VSP1 Read Pixel Formatter
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*
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* Copyright (C) 2013-2014 Renesas Electronics Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*/
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#include <linux/device.h>
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#include <media/v4l2-subdev.h>
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#include "vsp1.h"
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#include "vsp1_dl.h"
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#include "vsp1_pipe.h"
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#include "vsp1_rwpf.h"
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#include "vsp1_video.h"
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#define RPF_MAX_WIDTH 8190
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#define RPF_MAX_HEIGHT 8190
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/* Pre extended display list command data structure. */
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struct vsp1_extcmd_auto_fld_body {
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u32 top_y0;
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u32 bottom_y0;
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u32 top_c0;
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u32 bottom_c0;
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u32 top_c1;
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u32 bottom_c1;
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u32 reserved0;
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u32 reserved1;
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} __packed;
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/* -----------------------------------------------------------------------------
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* Device Access
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*/
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static inline void vsp1_rpf_write(struct vsp1_rwpf *rpf,
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struct vsp1_dl_body *dlb, u32 reg, u32 data)
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{
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vsp1_dl_body_write(dlb, reg + rpf->entity.index * VI6_RPF_OFFSET,
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data);
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}
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/* -----------------------------------------------------------------------------
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* V4L2 Subdevice Operations
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*/
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static const struct v4l2_subdev_ops rpf_ops = {
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.pad = &vsp1_rwpf_pad_ops,
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};
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/* -----------------------------------------------------------------------------
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* VSP1 Entity Operations
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*/
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static void rpf_configure_stream(struct vsp1_entity *entity,
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struct vsp1_pipeline *pipe,
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struct vsp1_dl_list *dl,
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struct vsp1_dl_body *dlb)
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{
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struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
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const struct vsp1_format_info *fmtinfo = rpf->fmtinfo;
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const struct v4l2_pix_format_mplane *format = &rpf->format;
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const struct v4l2_mbus_framefmt *source_format;
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const struct v4l2_mbus_framefmt *sink_format;
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unsigned int left = 0;
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unsigned int top = 0;
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u32 pstride;
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u32 infmt;
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/* Stride */
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pstride = format->plane_fmt[0].bytesperline
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<< VI6_RPF_SRCM_PSTRIDE_Y_SHIFT;
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if (format->num_planes > 1)
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pstride |= format->plane_fmt[1].bytesperline
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<< VI6_RPF_SRCM_PSTRIDE_C_SHIFT;
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/*
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* pstride has both STRIDE_Y and STRIDE_C, but multiplying the whole
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* of pstride by 2 is conveniently OK here as we are multiplying both
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* values.
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*/
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if (pipe->interlaced)
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pstride *= 2;
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vsp1_rpf_write(rpf, dlb, VI6_RPF_SRCM_PSTRIDE, pstride);
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/* Format */
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sink_format = vsp1_entity_get_pad_format(&rpf->entity,
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rpf->entity.config,
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RWPF_PAD_SINK);
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source_format = vsp1_entity_get_pad_format(&rpf->entity,
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rpf->entity.config,
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RWPF_PAD_SOURCE);
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infmt = VI6_RPF_INFMT_CIPM
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| (fmtinfo->hwfmt << VI6_RPF_INFMT_RDFMT_SHIFT);
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if (fmtinfo->swap_yc)
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infmt |= VI6_RPF_INFMT_SPYCS;
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if (fmtinfo->swap_uv)
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infmt |= VI6_RPF_INFMT_SPUVS;
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if (sink_format->code != source_format->code)
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infmt |= VI6_RPF_INFMT_CSC;
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vsp1_rpf_write(rpf, dlb, VI6_RPF_INFMT, infmt);
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vsp1_rpf_write(rpf, dlb, VI6_RPF_DSWAP, fmtinfo->swap);
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/* Output location. */
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if (pipe->brx) {
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const struct v4l2_rect *compose;
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compose = vsp1_entity_get_pad_selection(pipe->brx,
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pipe->brx->config,
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rpf->brx_input,
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V4L2_SEL_TGT_COMPOSE);
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left = compose->left;
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top = compose->top;
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}
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if (pipe->interlaced)
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top /= 2;
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vsp1_rpf_write(rpf, dlb, VI6_RPF_LOC,
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(left << VI6_RPF_LOC_HCOORD_SHIFT) |
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(top << VI6_RPF_LOC_VCOORD_SHIFT));
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/*
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* On Gen2 use the alpha channel (extended to 8 bits) when available or
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* a fixed alpha value set through the V4L2_CID_ALPHA_COMPONENT control
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* otherwise.
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*
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* The Gen3 RPF has extended alpha capability and can both multiply the
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* alpha channel by a fixed global alpha value, and multiply the pixel
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* components to convert the input to premultiplied alpha.
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*
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* As alpha premultiplication is available in the BRx for both Gen2 and
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* Gen3 we handle it there and use the Gen3 alpha multiplier for global
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* alpha multiplication only. This however prevents conversion to
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* premultiplied alpha if no BRx is present in the pipeline. If that use
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* case turns out to be useful we will revisit the implementation (for
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* Gen3 only).
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*
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* We enable alpha multiplication on Gen3 using the fixed alpha value
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* set through the V4L2_CID_ALPHA_COMPONENT control when the input
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* contains an alpha channel. On Gen2 the global alpha is ignored in
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* that case.
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*
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* In all cases, disable color keying.
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*/
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vsp1_rpf_write(rpf, dlb, VI6_RPF_ALPH_SEL, VI6_RPF_ALPH_SEL_AEXT_EXT |
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(fmtinfo->alpha ? VI6_RPF_ALPH_SEL_ASEL_PACKED
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: VI6_RPF_ALPH_SEL_ASEL_FIXED));
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if (entity->vsp1->info->gen == 3) {
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u32 mult;
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if (fmtinfo->alpha) {
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/*
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* When the input contains an alpha channel enable the
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* alpha multiplier. If the input is premultiplied we
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* need to multiply both the alpha channel and the pixel
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* components by the global alpha value to keep them
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* premultiplied. Otherwise multiply the alpha channel
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* only.
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*/
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bool premultiplied = format->flags
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& V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
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mult = VI6_RPF_MULT_ALPHA_A_MMD_RATIO
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| (premultiplied ?
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VI6_RPF_MULT_ALPHA_P_MMD_RATIO :
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VI6_RPF_MULT_ALPHA_P_MMD_NONE);
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} else {
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/*
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* When the input doesn't contain an alpha channel the
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* global alpha value is applied in the unpacking unit,
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* the alpha multiplier isn't needed and must be
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* disabled.
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*/
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mult = VI6_RPF_MULT_ALPHA_A_MMD_NONE
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| VI6_RPF_MULT_ALPHA_P_MMD_NONE;
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}
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rpf->mult_alpha = mult;
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}
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vsp1_rpf_write(rpf, dlb, VI6_RPF_MSK_CTRL, 0);
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vsp1_rpf_write(rpf, dlb, VI6_RPF_CKEY_CTRL, 0);
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}
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static void vsp1_rpf_configure_autofld(struct vsp1_rwpf *rpf,
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struct vsp1_dl_list *dl)
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{
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const struct v4l2_pix_format_mplane *format = &rpf->format;
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struct vsp1_dl_ext_cmd *cmd;
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struct vsp1_extcmd_auto_fld_body *auto_fld;
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u32 offset_y, offset_c;
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cmd = vsp1_dl_get_pre_cmd(dl);
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if (WARN_ONCE(!cmd, "Failed to obtain an autofld cmd"))
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return;
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/* Re-index our auto_fld to match the current RPF. */
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auto_fld = cmd->data;
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auto_fld = &auto_fld[rpf->entity.index];
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auto_fld->top_y0 = rpf->mem.addr[0];
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auto_fld->top_c0 = rpf->mem.addr[1];
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auto_fld->top_c1 = rpf->mem.addr[2];
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offset_y = format->plane_fmt[0].bytesperline;
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offset_c = format->plane_fmt[1].bytesperline;
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auto_fld->bottom_y0 = rpf->mem.addr[0] + offset_y;
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auto_fld->bottom_c0 = rpf->mem.addr[1] + offset_c;
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auto_fld->bottom_c1 = rpf->mem.addr[2] + offset_c;
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cmd->flags |= VI6_DL_EXT_AUTOFLD_INT | BIT(16 + rpf->entity.index);
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}
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static void rpf_configure_frame(struct vsp1_entity *entity,
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struct vsp1_pipeline *pipe,
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struct vsp1_dl_list *dl,
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struct vsp1_dl_body *dlb)
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{
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struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
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vsp1_rpf_write(rpf, dlb, VI6_RPF_VRTCOL_SET,
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rpf->alpha << VI6_RPF_VRTCOL_SET_LAYA_SHIFT);
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vsp1_rpf_write(rpf, dlb, VI6_RPF_MULT_ALPHA, rpf->mult_alpha |
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(rpf->alpha << VI6_RPF_MULT_ALPHA_RATIO_SHIFT));
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vsp1_pipeline_propagate_alpha(pipe, dlb, rpf->alpha);
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}
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static void rpf_configure_partition(struct vsp1_entity *entity,
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struct vsp1_pipeline *pipe,
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struct vsp1_dl_list *dl,
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struct vsp1_dl_body *dlb)
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{
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struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
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struct vsp1_rwpf_memory mem = rpf->mem;
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struct vsp1_device *vsp1 = rpf->entity.vsp1;
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const struct vsp1_format_info *fmtinfo = rpf->fmtinfo;
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const struct v4l2_pix_format_mplane *format = &rpf->format;
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struct v4l2_rect crop;
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/*
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* Source size and crop offsets.
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*
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* The crop offsets correspond to the location of the crop
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* rectangle top left corner in the plane buffer. Only two
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* offsets are needed, as planes 2 and 3 always have identical
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* strides.
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*/
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crop = *vsp1_rwpf_get_crop(rpf, rpf->entity.config);
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/*
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* Partition Algorithm Control
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*
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* The partition algorithm can split this frame into multiple
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* slices. We must scale our partition window based on the pipe
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* configuration to match the destination partition window.
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* To achieve this, we adjust our crop to provide a 'sub-crop'
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* matching the expected partition window. Only 'left' and
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* 'width' need to be adjusted.
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*/
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if (pipe->partitions > 1) {
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crop.width = pipe->partition->rpf.width;
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crop.left += pipe->partition->rpf.left;
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}
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if (pipe->interlaced) {
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crop.height = round_down(crop.height / 2, fmtinfo->vsub);
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crop.top = round_down(crop.top / 2, fmtinfo->vsub);
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}
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vsp1_rpf_write(rpf, dlb, VI6_RPF_SRC_BSIZE,
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(crop.width << VI6_RPF_SRC_BSIZE_BHSIZE_SHIFT) |
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(crop.height << VI6_RPF_SRC_BSIZE_BVSIZE_SHIFT));
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vsp1_rpf_write(rpf, dlb, VI6_RPF_SRC_ESIZE,
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(crop.width << VI6_RPF_SRC_ESIZE_EHSIZE_SHIFT) |
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(crop.height << VI6_RPF_SRC_ESIZE_EVSIZE_SHIFT));
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mem.addr[0] += crop.top * format->plane_fmt[0].bytesperline
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+ crop.left * fmtinfo->bpp[0] / 8;
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if (format->num_planes > 1) {
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unsigned int bpl = format->plane_fmt[1].bytesperline;
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unsigned int offset;
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offset = crop.top / fmtinfo->vsub * bpl
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+ crop.left / fmtinfo->hsub * fmtinfo->bpp[1] / 8;
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mem.addr[1] += offset;
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mem.addr[2] += offset;
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}
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/*
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* On Gen3 hardware the SPUVS bit has no effect on 3-planar
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* formats. Swap the U and V planes manually in that case.
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*/
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if (vsp1->info->gen == 3 && format->num_planes == 3 &&
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fmtinfo->swap_uv)
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swap(mem.addr[1], mem.addr[2]);
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/*
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* Interlaced pipelines will use the extended pre-cmd to process
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* SRCM_ADDR_{Y,C0,C1}.
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*/
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if (pipe->interlaced) {
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vsp1_rpf_configure_autofld(rpf, dl);
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} else {
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vsp1_rpf_write(rpf, dlb, VI6_RPF_SRCM_ADDR_Y, mem.addr[0]);
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vsp1_rpf_write(rpf, dlb, VI6_RPF_SRCM_ADDR_C0, mem.addr[1]);
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vsp1_rpf_write(rpf, dlb, VI6_RPF_SRCM_ADDR_C1, mem.addr[2]);
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}
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}
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static void rpf_partition(struct vsp1_entity *entity,
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struct vsp1_pipeline *pipe,
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struct vsp1_partition *partition,
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unsigned int partition_idx,
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struct vsp1_partition_window *window)
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{
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partition->rpf = *window;
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}
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static const struct vsp1_entity_operations rpf_entity_ops = {
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.configure_stream = rpf_configure_stream,
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.configure_frame = rpf_configure_frame,
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.configure_partition = rpf_configure_partition,
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.partition = rpf_partition,
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};
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/* -----------------------------------------------------------------------------
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* Initialization and Cleanup
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*/
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struct vsp1_rwpf *vsp1_rpf_create(struct vsp1_device *vsp1, unsigned int index)
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{
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struct vsp1_rwpf *rpf;
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char name[6];
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int ret;
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rpf = devm_kzalloc(vsp1->dev, sizeof(*rpf), GFP_KERNEL);
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if (rpf == NULL)
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return ERR_PTR(-ENOMEM);
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rpf->max_width = RPF_MAX_WIDTH;
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rpf->max_height = RPF_MAX_HEIGHT;
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rpf->entity.ops = &rpf_entity_ops;
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rpf->entity.type = VSP1_ENTITY_RPF;
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rpf->entity.index = index;
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sprintf(name, "rpf.%u", index);
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ret = vsp1_entity_init(vsp1, &rpf->entity, name, 2, &rpf_ops,
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MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER);
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if (ret < 0)
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return ERR_PTR(ret);
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/* Initialize the control handler. */
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ret = vsp1_rwpf_init_ctrls(rpf, 0);
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if (ret < 0) {
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dev_err(vsp1->dev, "rpf%u: failed to initialize controls\n",
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index);
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goto error;
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}
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v4l2_ctrl_handler_setup(&rpf->ctrls);
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return rpf;
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error:
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vsp1_entity_destroy(&rpf->entity);
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return ERR_PTR(ret);
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}
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