// SPDX-License-Identifier: GPL-2.0+
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/*
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* vsp1_hgt.c -- R-Car VSP1 Histogram Generator 2D
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*
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* Copyright (C) 2016 Renesas Electronics Corporation
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*
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* Contact: Niklas Söderlund (niklas.soderlund@ragnatech.se)
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*/
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#include <linux/device.h>
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#include <linux/gfp.h>
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#include <media/v4l2-subdev.h>
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#include <media/videobuf2-vmalloc.h>
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#include "vsp1.h"
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#include "vsp1_dl.h"
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#include "vsp1_hgt.h"
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#define HGT_DATA_SIZE ((2 + 6 * 32) * 4)
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/* -----------------------------------------------------------------------------
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* Device Access
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*/
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static inline u32 vsp1_hgt_read(struct vsp1_hgt *hgt, u32 reg)
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{
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return vsp1_read(hgt->histo.entity.vsp1, reg);
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}
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static inline void vsp1_hgt_write(struct vsp1_hgt *hgt,
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struct vsp1_dl_body *dlb, u32 reg, u32 data)
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{
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vsp1_dl_body_write(dlb, reg, data);
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}
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/* -----------------------------------------------------------------------------
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* Frame End Handler
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*/
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void vsp1_hgt_frame_end(struct vsp1_entity *entity)
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{
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struct vsp1_hgt *hgt = to_hgt(&entity->subdev);
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struct vsp1_histogram_buffer *buf;
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unsigned int m;
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unsigned int n;
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u32 *data;
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buf = vsp1_histogram_buffer_get(&hgt->histo);
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if (!buf)
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return;
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data = buf->addr;
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*data++ = vsp1_hgt_read(hgt, VI6_HGT_MAXMIN);
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*data++ = vsp1_hgt_read(hgt, VI6_HGT_SUM);
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for (m = 0; m < 6; ++m)
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for (n = 0; n < 32; ++n)
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*data++ = vsp1_hgt_read(hgt, VI6_HGT_HISTO(m, n));
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vsp1_histogram_buffer_complete(&hgt->histo, buf, HGT_DATA_SIZE);
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}
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/* -----------------------------------------------------------------------------
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* Controls
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*/
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#define V4L2_CID_VSP1_HGT_HUE_AREAS (V4L2_CID_USER_BASE | 0x1001)
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static int hgt_hue_areas_try_ctrl(struct v4l2_ctrl *ctrl)
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{
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const u8 *values = ctrl->p_new.p_u8;
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unsigned int i;
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/*
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* The hardware has constraints on the hue area boundaries beyond the
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* control min, max and step. The values must match one of the following
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* expressions.
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*
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* 0L <= 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U
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* 0U <= 1L <= 1U <= 2L <= 2U <= 3L <= 3U <= 4L <= 4U <= 5L <= 5U <= 0L
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*
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* Start by verifying the common part...
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*/
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for (i = 1; i < (HGT_NUM_HUE_AREAS * 2) - 1; ++i) {
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if (values[i] > values[i+1])
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return -EINVAL;
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}
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/* ... and handle 0L separately. */
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if (values[0] > values[1] && values[11] > values[0])
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return -EINVAL;
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return 0;
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}
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static int hgt_hue_areas_s_ctrl(struct v4l2_ctrl *ctrl)
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{
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struct vsp1_hgt *hgt = container_of(ctrl->handler, struct vsp1_hgt,
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ctrls);
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memcpy(hgt->hue_areas, ctrl->p_new.p_u8, sizeof(hgt->hue_areas));
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return 0;
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}
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static const struct v4l2_ctrl_ops hgt_hue_areas_ctrl_ops = {
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.try_ctrl = hgt_hue_areas_try_ctrl,
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.s_ctrl = hgt_hue_areas_s_ctrl,
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};
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static const struct v4l2_ctrl_config hgt_hue_areas = {
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.ops = &hgt_hue_areas_ctrl_ops,
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.id = V4L2_CID_VSP1_HGT_HUE_AREAS,
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.name = "Boundary Values for Hue Area",
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.type = V4L2_CTRL_TYPE_U8,
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.min = 0,
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.max = 255,
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.def = 0,
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.step = 1,
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.dims = { 12 },
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};
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/* -----------------------------------------------------------------------------
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* VSP1 Entity Operations
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*/
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static void hgt_configure_stream(struct vsp1_entity *entity,
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struct vsp1_pipeline *pipe,
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struct vsp1_dl_list *dl,
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struct vsp1_dl_body *dlb)
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{
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struct vsp1_hgt *hgt = to_hgt(&entity->subdev);
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struct v4l2_rect *compose;
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struct v4l2_rect *crop;
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unsigned int hratio;
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unsigned int vratio;
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u8 lower;
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u8 upper;
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unsigned int i;
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crop = vsp1_entity_get_pad_selection(entity, entity->config,
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HISTO_PAD_SINK, V4L2_SEL_TGT_CROP);
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compose = vsp1_entity_get_pad_selection(entity, entity->config,
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HISTO_PAD_SINK,
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V4L2_SEL_TGT_COMPOSE);
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vsp1_hgt_write(hgt, dlb, VI6_HGT_REGRST, VI6_HGT_REGRST_RCLEA);
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vsp1_hgt_write(hgt, dlb, VI6_HGT_OFFSET,
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(crop->left << VI6_HGT_OFFSET_HOFFSET_SHIFT) |
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(crop->top << VI6_HGT_OFFSET_VOFFSET_SHIFT));
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vsp1_hgt_write(hgt, dlb, VI6_HGT_SIZE,
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(crop->width << VI6_HGT_SIZE_HSIZE_SHIFT) |
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(crop->height << VI6_HGT_SIZE_VSIZE_SHIFT));
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mutex_lock(hgt->ctrls.lock);
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for (i = 0; i < HGT_NUM_HUE_AREAS; ++i) {
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lower = hgt->hue_areas[i*2 + 0];
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upper = hgt->hue_areas[i*2 + 1];
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vsp1_hgt_write(hgt, dlb, VI6_HGT_HUE_AREA(i),
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(lower << VI6_HGT_HUE_AREA_LOWER_SHIFT) |
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(upper << VI6_HGT_HUE_AREA_UPPER_SHIFT));
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}
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mutex_unlock(hgt->ctrls.lock);
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hratio = crop->width * 2 / compose->width / 3;
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vratio = crop->height * 2 / compose->height / 3;
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vsp1_hgt_write(hgt, dlb, VI6_HGT_MODE,
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(hratio << VI6_HGT_MODE_HRATIO_SHIFT) |
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(vratio << VI6_HGT_MODE_VRATIO_SHIFT));
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}
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static const struct vsp1_entity_operations hgt_entity_ops = {
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.configure_stream = hgt_configure_stream,
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.destroy = vsp1_histogram_destroy,
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};
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/* -----------------------------------------------------------------------------
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* Initialization and Cleanup
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*/
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static const unsigned int hgt_mbus_formats[] = {
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MEDIA_BUS_FMT_AHSV8888_1X32,
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};
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struct vsp1_hgt *vsp1_hgt_create(struct vsp1_device *vsp1)
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{
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struct vsp1_hgt *hgt;
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int ret;
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hgt = devm_kzalloc(vsp1->dev, sizeof(*hgt), GFP_KERNEL);
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if (hgt == NULL)
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return ERR_PTR(-ENOMEM);
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/* Initialize the control handler. */
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v4l2_ctrl_handler_init(&hgt->ctrls, 1);
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v4l2_ctrl_new_custom(&hgt->ctrls, &hgt_hue_areas, NULL);
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hgt->histo.entity.subdev.ctrl_handler = &hgt->ctrls;
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/* Initialize the video device and queue for statistics data. */
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ret = vsp1_histogram_init(vsp1, &hgt->histo, VSP1_ENTITY_HGT, "hgt",
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&hgt_entity_ops, hgt_mbus_formats,
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ARRAY_SIZE(hgt_mbus_formats),
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HGT_DATA_SIZE, V4L2_META_FMT_VSP1_HGT);
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if (ret < 0) {
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vsp1_entity_destroy(&hgt->histo.entity);
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return ERR_PTR(ret);
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}
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v4l2_ctrl_handler_setup(&hgt->ctrls);
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return hgt;
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}
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