// SPDX-License-Identifier: GPL-2.0
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/*
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* Allwinner sun8i deinterlacer with scaler driver
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*
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* Copyright (C) 2019 Jernej Skrabec <jernej.skrabec@siol.net>
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*
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* Based on vim2m driver.
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*/
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-ioctl.h>
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#include <media/v4l2-mem2mem.h>
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#include "sun8i-di.h"
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#define FLAG_SIZE (DEINTERLACE_MAX_WIDTH * DEINTERLACE_MAX_HEIGHT / 4)
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static u32 deinterlace_formats[] = {
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V4L2_PIX_FMT_NV12,
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V4L2_PIX_FMT_NV21,
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};
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static inline u32 deinterlace_read(struct deinterlace_dev *dev, u32 reg)
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{
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return readl(dev->base + reg);
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}
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static inline void deinterlace_write(struct deinterlace_dev *dev,
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u32 reg, u32 value)
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{
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writel(value, dev->base + reg);
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}
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static inline void deinterlace_set_bits(struct deinterlace_dev *dev,
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u32 reg, u32 bits)
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{
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writel(readl(dev->base + reg) | bits, dev->base + reg);
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}
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static inline void deinterlace_clr_set_bits(struct deinterlace_dev *dev,
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u32 reg, u32 clr, u32 set)
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{
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u32 val = readl(dev->base + reg);
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val &= ~clr;
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val |= set;
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writel(val, dev->base + reg);
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}
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static void deinterlace_device_run(void *priv)
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{
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struct deinterlace_ctx *ctx = priv;
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struct deinterlace_dev *dev = ctx->dev;
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u32 size, stride, width, height, val;
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struct vb2_v4l2_buffer *src, *dst;
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unsigned int hstep, vstep;
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dma_addr_t addr;
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src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
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dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
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v4l2_m2m_buf_copy_metadata(src, dst, true);
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deinterlace_write(dev, DEINTERLACE_MOD_ENABLE,
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DEINTERLACE_MOD_ENABLE_EN);
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if (ctx->field) {
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deinterlace_write(dev, DEINTERLACE_TILE_FLAG0,
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ctx->flag1_buf_dma);
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deinterlace_write(dev, DEINTERLACE_TILE_FLAG1,
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ctx->flag2_buf_dma);
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} else {
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deinterlace_write(dev, DEINTERLACE_TILE_FLAG0,
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ctx->flag2_buf_dma);
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deinterlace_write(dev, DEINTERLACE_TILE_FLAG1,
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ctx->flag1_buf_dma);
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}
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deinterlace_write(dev, DEINTERLACE_FLAG_LINE_STRIDE, 0x200);
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width = ctx->src_fmt.width;
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height = ctx->src_fmt.height;
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stride = ctx->src_fmt.bytesperline;
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size = stride * height;
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addr = vb2_dma_contig_plane_dma_addr(&src->vb2_buf, 0);
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deinterlace_write(dev, DEINTERLACE_BUF_ADDR0, addr);
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deinterlace_write(dev, DEINTERLACE_BUF_ADDR1, addr + size);
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deinterlace_write(dev, DEINTERLACE_BUF_ADDR2, 0);
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deinterlace_write(dev, DEINTERLACE_LINE_STRIDE0, stride);
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deinterlace_write(dev, DEINTERLACE_LINE_STRIDE1, stride);
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deinterlace_write(dev, DEINTERLACE_CH0_IN_SIZE,
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DEINTERLACE_SIZE(width, height));
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deinterlace_write(dev, DEINTERLACE_CH1_IN_SIZE,
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DEINTERLACE_SIZE(width / 2, height / 2));
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val = DEINTERLACE_IN_FMT_FMT(DEINTERLACE_IN_FMT_YUV420) |
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DEINTERLACE_IN_FMT_MOD(DEINTERLACE_MODE_UV_COMBINED);
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switch (ctx->src_fmt.pixelformat) {
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case V4L2_PIX_FMT_NV12:
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val |= DEINTERLACE_IN_FMT_PS(DEINTERLACE_PS_UVUV);
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break;
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case V4L2_PIX_FMT_NV21:
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val |= DEINTERLACE_IN_FMT_PS(DEINTERLACE_PS_VUVU);
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break;
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}
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deinterlace_write(dev, DEINTERLACE_IN_FMT, val);
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if (ctx->prev)
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addr = vb2_dma_contig_plane_dma_addr(&ctx->prev->vb2_buf, 0);
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deinterlace_write(dev, DEINTERLACE_PRELUMA, addr);
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deinterlace_write(dev, DEINTERLACE_PRECHROMA, addr + size);
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val = DEINTERLACE_OUT_FMT_FMT(DEINTERLACE_OUT_FMT_YUV420SP);
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switch (ctx->src_fmt.pixelformat) {
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case V4L2_PIX_FMT_NV12:
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val |= DEINTERLACE_OUT_FMT_PS(DEINTERLACE_PS_UVUV);
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break;
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case V4L2_PIX_FMT_NV21:
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val |= DEINTERLACE_OUT_FMT_PS(DEINTERLACE_PS_VUVU);
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break;
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}
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deinterlace_write(dev, DEINTERLACE_OUT_FMT, val);
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width = ctx->dst_fmt.width;
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height = ctx->dst_fmt.height;
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stride = ctx->dst_fmt.bytesperline;
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size = stride * height;
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deinterlace_write(dev, DEINTERLACE_CH0_OUT_SIZE,
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DEINTERLACE_SIZE(width, height));
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deinterlace_write(dev, DEINTERLACE_CH1_OUT_SIZE,
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DEINTERLACE_SIZE(width / 2, height / 2));
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deinterlace_write(dev, DEINTERLACE_WB_LINE_STRIDE0, stride);
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deinterlace_write(dev, DEINTERLACE_WB_LINE_STRIDE1, stride);
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addr = vb2_dma_contig_plane_dma_addr(&dst->vb2_buf, 0);
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deinterlace_write(dev, DEINTERLACE_WB_ADDR0, addr);
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deinterlace_write(dev, DEINTERLACE_WB_ADDR1, addr + size);
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deinterlace_write(dev, DEINTERLACE_WB_ADDR2, 0);
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hstep = (ctx->src_fmt.width << 16) / ctx->dst_fmt.width;
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vstep = (ctx->src_fmt.height << 16) / ctx->dst_fmt.height;
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deinterlace_write(dev, DEINTERLACE_CH0_HORZ_FACT, hstep);
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deinterlace_write(dev, DEINTERLACE_CH0_VERT_FACT, vstep);
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deinterlace_write(dev, DEINTERLACE_CH1_HORZ_FACT, hstep);
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deinterlace_write(dev, DEINTERLACE_CH1_VERT_FACT, vstep);
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deinterlace_clr_set_bits(dev, DEINTERLACE_FIELD_CTRL,
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DEINTERLACE_FIELD_CTRL_FIELD_CNT_MSK,
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DEINTERLACE_FIELD_CTRL_FIELD_CNT(ctx->field));
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deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_START);
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deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_REG_READY);
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deinterlace_set_bits(dev, DEINTERLACE_INT_ENABLE,
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DEINTERLACE_INT_ENABLE_WB_EN);
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deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_WB_EN);
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}
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static int deinterlace_job_ready(void *priv)
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{
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struct deinterlace_ctx *ctx = priv;
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return v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) >= 1 &&
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v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx) >= 2;
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}
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static void deinterlace_job_abort(void *priv)
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{
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struct deinterlace_ctx *ctx = priv;
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/* Will cancel the transaction in the next interrupt handler */
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ctx->aborting = 1;
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}
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static irqreturn_t deinterlace_irq(int irq, void *data)
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{
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struct deinterlace_dev *dev = data;
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struct vb2_v4l2_buffer *src, *dst;
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enum vb2_buffer_state state;
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struct deinterlace_ctx *ctx;
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unsigned int val;
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ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
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if (!ctx) {
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v4l2_err(&dev->v4l2_dev,
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"Instance released before the end of transaction\n");
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return IRQ_NONE;
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}
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val = deinterlace_read(dev, DEINTERLACE_INT_STATUS);
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if (!(val & DEINTERLACE_INT_STATUS_WRITEBACK))
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return IRQ_NONE;
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deinterlace_write(dev, DEINTERLACE_INT_ENABLE, 0);
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deinterlace_set_bits(dev, DEINTERLACE_INT_STATUS,
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DEINTERLACE_INT_STATUS_WRITEBACK);
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deinterlace_write(dev, DEINTERLACE_MOD_ENABLE, 0);
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deinterlace_clr_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_START, 0);
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val = deinterlace_read(dev, DEINTERLACE_STATUS);
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if (val & DEINTERLACE_STATUS_WB_ERROR)
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state = VB2_BUF_STATE_ERROR;
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else
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state = VB2_BUF_STATE_DONE;
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dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
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v4l2_m2m_buf_done(dst, state);
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if (ctx->field != ctx->first_field || ctx->aborting) {
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ctx->field = ctx->first_field;
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src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
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if (ctx->prev)
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v4l2_m2m_buf_done(ctx->prev, state);
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ctx->prev = src;
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v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
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} else {
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ctx->field = !ctx->first_field;
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deinterlace_device_run(ctx);
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}
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return IRQ_HANDLED;
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}
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static void deinterlace_init(struct deinterlace_dev *dev)
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{
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u32 val;
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int i;
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deinterlace_write(dev, DEINTERLACE_BYPASS,
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DEINTERLACE_BYPASS_CSC);
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deinterlace_write(dev, DEINTERLACE_WB_LINE_STRIDE_CTRL,
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DEINTERLACE_WB_LINE_STRIDE_CTRL_EN);
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deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_OUT_CTRL);
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deinterlace_write(dev, DEINTERLACE_AGTH_SEL,
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DEINTERLACE_AGTH_SEL_LINEBUF);
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val = DEINTERLACE_CTRL_EN |
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DEINTERLACE_CTRL_MODE_MIXED |
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DEINTERLACE_CTRL_DIAG_INTP_EN |
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DEINTERLACE_CTRL_TEMP_DIFF_EN;
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deinterlace_write(dev, DEINTERLACE_CTRL, val);
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deinterlace_clr_set_bits(dev, DEINTERLACE_LUMA_TH,
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DEINTERLACE_LUMA_TH_MIN_LUMA_MSK,
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DEINTERLACE_LUMA_TH_MIN_LUMA(4));
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deinterlace_clr_set_bits(dev, DEINTERLACE_SPAT_COMP,
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DEINTERLACE_SPAT_COMP_TH2_MSK,
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DEINTERLACE_SPAT_COMP_TH2(5));
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deinterlace_clr_set_bits(dev, DEINTERLACE_TEMP_DIFF,
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DEINTERLACE_TEMP_DIFF_AMBIGUITY_TH_MSK,
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DEINTERLACE_TEMP_DIFF_AMBIGUITY_TH(5));
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val = DEINTERLACE_DIAG_INTP_TH0(60) |
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DEINTERLACE_DIAG_INTP_TH1(0) |
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DEINTERLACE_DIAG_INTP_TH3(30);
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deinterlace_write(dev, DEINTERLACE_DIAG_INTP, val);
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deinterlace_clr_set_bits(dev, DEINTERLACE_CHROMA_DIFF,
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DEINTERLACE_CHROMA_DIFF_TH_MSK,
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DEINTERLACE_CHROMA_DIFF_TH(5));
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/* neutral filter coefficients */
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deinterlace_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_COEF_ACCESS);
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readl_poll_timeout(dev->base + DEINTERLACE_STATUS, val,
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val & DEINTERLACE_STATUS_COEF_STATUS, 2, 40);
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for (i = 0; i < 32; i++) {
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deinterlace_write(dev, DEINTERLACE_CH0_HORZ_COEF0 + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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deinterlace_write(dev, DEINTERLACE_CH0_VERT_COEF + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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deinterlace_write(dev, DEINTERLACE_CH1_HORZ_COEF0 + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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deinterlace_write(dev, DEINTERLACE_CH1_VERT_COEF + i * 4,
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DEINTERLACE_IDENTITY_COEF);
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}
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deinterlace_clr_set_bits(dev, DEINTERLACE_FRM_CTRL,
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DEINTERLACE_FRM_CTRL_COEF_ACCESS, 0);
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}
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static inline struct deinterlace_ctx *deinterlace_file2ctx(struct file *file)
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{
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return container_of(file->private_data, struct deinterlace_ctx, fh);
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}
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static bool deinterlace_check_format(u32 pixelformat)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(deinterlace_formats); i++)
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if (deinterlace_formats[i] == pixelformat)
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return true;
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return false;
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}
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static void deinterlace_prepare_format(struct v4l2_pix_format *pix_fmt)
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{
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unsigned int height = pix_fmt->height;
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unsigned int width = pix_fmt->width;
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unsigned int bytesperline;
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unsigned int sizeimage;
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width = clamp(width, DEINTERLACE_MIN_WIDTH,
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DEINTERLACE_MAX_WIDTH);
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height = clamp(height, DEINTERLACE_MIN_HEIGHT,
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DEINTERLACE_MAX_HEIGHT);
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bytesperline = ALIGN(width, 2);
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/* luma */
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sizeimage = bytesperline * height;
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/* chroma */
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sizeimage += bytesperline * height / 2;
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pix_fmt->width = width;
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pix_fmt->height = height;
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pix_fmt->bytesperline = bytesperline;
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pix_fmt->sizeimage = sizeimage;
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}
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static int deinterlace_querycap(struct file *file, void *priv,
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struct v4l2_capability *cap)
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{
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strscpy(cap->driver, DEINTERLACE_NAME, sizeof(cap->driver));
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strscpy(cap->card, DEINTERLACE_NAME, sizeof(cap->card));
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snprintf(cap->bus_info, sizeof(cap->bus_info),
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"platform:%s", DEINTERLACE_NAME);
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return 0;
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}
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static int deinterlace_enum_fmt(struct file *file, void *priv,
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struct v4l2_fmtdesc *f)
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{
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if (f->index < ARRAY_SIZE(deinterlace_formats)) {
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f->pixelformat = deinterlace_formats[f->index];
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return 0;
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}
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return -EINVAL;
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}
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static int deinterlace_enum_framesizes(struct file *file, void *priv,
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struct v4l2_frmsizeenum *fsize)
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{
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if (fsize->index != 0)
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return -EINVAL;
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if (!deinterlace_check_format(fsize->pixel_format))
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return -EINVAL;
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fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
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fsize->stepwise.min_width = DEINTERLACE_MIN_WIDTH;
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fsize->stepwise.min_height = DEINTERLACE_MIN_HEIGHT;
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fsize->stepwise.max_width = DEINTERLACE_MAX_WIDTH;
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fsize->stepwise.max_height = DEINTERLACE_MAX_HEIGHT;
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fsize->stepwise.step_width = 2;
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fsize->stepwise.step_height = 1;
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return 0;
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}
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static int deinterlace_g_fmt_vid_cap(struct file *file, void *priv,
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struct v4l2_format *f)
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{
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struct deinterlace_ctx *ctx = deinterlace_file2ctx(file);
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f->fmt.pix = ctx->dst_fmt;
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return 0;
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}
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static int deinterlace_g_fmt_vid_out(struct file *file, void *priv,
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struct v4l2_format *f)
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{
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struct deinterlace_ctx *ctx = deinterlace_file2ctx(file);
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f->fmt.pix = ctx->src_fmt;
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return 0;
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}
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static int deinterlace_try_fmt_vid_cap(struct file *file, void *priv,
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struct v4l2_format *f)
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{
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if (!deinterlace_check_format(f->fmt.pix.pixelformat))
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f->fmt.pix.pixelformat = deinterlace_formats[0];
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if (f->fmt.pix.field != V4L2_FIELD_NONE)
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f->fmt.pix.field = V4L2_FIELD_NONE;
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deinterlace_prepare_format(&f->fmt.pix);
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return 0;
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}
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static int deinterlace_try_fmt_vid_out(struct file *file, void *priv,
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struct v4l2_format *f)
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{
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if (!deinterlace_check_format(f->fmt.pix.pixelformat))
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f->fmt.pix.pixelformat = deinterlace_formats[0];
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if (f->fmt.pix.field != V4L2_FIELD_INTERLACED_TB &&
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f->fmt.pix.field != V4L2_FIELD_INTERLACED_BT &&
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f->fmt.pix.field != V4L2_FIELD_INTERLACED)
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f->fmt.pix.field = V4L2_FIELD_INTERLACED;
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deinterlace_prepare_format(&f->fmt.pix);
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return 0;
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}
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static int deinterlace_s_fmt_vid_cap(struct file *file, void *priv,
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struct v4l2_format *f)
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{
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struct deinterlace_ctx *ctx = deinterlace_file2ctx(file);
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struct vb2_queue *vq;
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int ret;
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ret = deinterlace_try_fmt_vid_cap(file, priv, f);
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if (ret)
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return ret;
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vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
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if (vb2_is_busy(vq))
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return -EBUSY;
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ctx->dst_fmt = f->fmt.pix;
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return 0;
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}
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static int deinterlace_s_fmt_vid_out(struct file *file, void *priv,
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struct v4l2_format *f)
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{
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struct deinterlace_ctx *ctx = deinterlace_file2ctx(file);
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struct vb2_queue *vq;
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int ret;
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ret = deinterlace_try_fmt_vid_out(file, priv, f);
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if (ret)
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return ret;
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vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
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if (vb2_is_busy(vq))
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return -EBUSY;
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ctx->src_fmt = f->fmt.pix;
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/* Propagate colorspace information to capture. */
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ctx->dst_fmt.colorspace = f->fmt.pix.colorspace;
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ctx->dst_fmt.xfer_func = f->fmt.pix.xfer_func;
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ctx->dst_fmt.ycbcr_enc = f->fmt.pix.ycbcr_enc;
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ctx->dst_fmt.quantization = f->fmt.pix.quantization;
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return 0;
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}
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static const struct v4l2_ioctl_ops deinterlace_ioctl_ops = {
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.vidioc_querycap = deinterlace_querycap,
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.vidioc_enum_framesizes = deinterlace_enum_framesizes,
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.vidioc_enum_fmt_vid_cap = deinterlace_enum_fmt,
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.vidioc_g_fmt_vid_cap = deinterlace_g_fmt_vid_cap,
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.vidioc_try_fmt_vid_cap = deinterlace_try_fmt_vid_cap,
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.vidioc_s_fmt_vid_cap = deinterlace_s_fmt_vid_cap,
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.vidioc_enum_fmt_vid_out = deinterlace_enum_fmt,
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.vidioc_g_fmt_vid_out = deinterlace_g_fmt_vid_out,
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.vidioc_try_fmt_vid_out = deinterlace_try_fmt_vid_out,
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.vidioc_s_fmt_vid_out = deinterlace_s_fmt_vid_out,
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.vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
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.vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
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.vidioc_qbuf = v4l2_m2m_ioctl_qbuf,
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.vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf,
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.vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf,
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.vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
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.vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
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.vidioc_streamon = v4l2_m2m_ioctl_streamon,
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.vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
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};
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static int deinterlace_queue_setup(struct vb2_queue *vq, unsigned int *nbuffers,
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unsigned int *nplanes, unsigned int sizes[],
|
struct device *alloc_devs[])
|
{
|
struct deinterlace_ctx *ctx = vb2_get_drv_priv(vq);
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struct v4l2_pix_format *pix_fmt;
|
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if (V4L2_TYPE_IS_OUTPUT(vq->type))
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pix_fmt = &ctx->src_fmt;
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else
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pix_fmt = &ctx->dst_fmt;
|
|
if (*nplanes) {
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if (sizes[0] < pix_fmt->sizeimage)
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return -EINVAL;
|
} else {
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sizes[0] = pix_fmt->sizeimage;
|
*nplanes = 1;
|
}
|
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return 0;
|
}
|
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static int deinterlace_buf_prepare(struct vb2_buffer *vb)
|
{
|
struct vb2_queue *vq = vb->vb2_queue;
|
struct deinterlace_ctx *ctx = vb2_get_drv_priv(vq);
|
struct v4l2_pix_format *pix_fmt;
|
|
if (V4L2_TYPE_IS_OUTPUT(vq->type))
|
pix_fmt = &ctx->src_fmt;
|
else
|
pix_fmt = &ctx->dst_fmt;
|
|
if (vb2_plane_size(vb, 0) < pix_fmt->sizeimage)
|
return -EINVAL;
|
|
vb2_set_plane_payload(vb, 0, pix_fmt->sizeimage);
|
|
return 0;
|
}
|
|
static void deinterlace_buf_queue(struct vb2_buffer *vb)
|
{
|
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
struct deinterlace_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
|
|
v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf);
|
}
|
|
static void deinterlace_queue_cleanup(struct vb2_queue *vq, u32 state)
|
{
|
struct deinterlace_ctx *ctx = vb2_get_drv_priv(vq);
|
struct vb2_v4l2_buffer *vbuf;
|
|
do {
|
if (V4L2_TYPE_IS_OUTPUT(vq->type))
|
vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
|
else
|
vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
|
|
if (vbuf)
|
v4l2_m2m_buf_done(vbuf, state);
|
} while (vbuf);
|
|
if (V4L2_TYPE_IS_OUTPUT(vq->type) && ctx->prev)
|
v4l2_m2m_buf_done(ctx->prev, state);
|
}
|
|
static int deinterlace_start_streaming(struct vb2_queue *vq, unsigned int count)
|
{
|
struct deinterlace_ctx *ctx = vb2_get_drv_priv(vq);
|
struct device *dev = ctx->dev->dev;
|
int ret;
|
|
if (V4L2_TYPE_IS_OUTPUT(vq->type)) {
|
ret = pm_runtime_resume_and_get(dev);
|
if (ret < 0) {
|
dev_err(dev, "Failed to enable module\n");
|
|
goto err_runtime_get;
|
}
|
|
ctx->first_field =
|
ctx->src_fmt.field == V4L2_FIELD_INTERLACED_BT;
|
ctx->field = ctx->first_field;
|
|
ctx->prev = NULL;
|
ctx->aborting = 0;
|
|
ctx->flag1_buf = dma_alloc_coherent(dev, FLAG_SIZE,
|
&ctx->flag1_buf_dma,
|
GFP_KERNEL);
|
if (!ctx->flag1_buf) {
|
ret = -ENOMEM;
|
|
goto err_no_mem1;
|
}
|
|
ctx->flag2_buf = dma_alloc_coherent(dev, FLAG_SIZE,
|
&ctx->flag2_buf_dma,
|
GFP_KERNEL);
|
if (!ctx->flag2_buf) {
|
ret = -ENOMEM;
|
|
goto err_no_mem2;
|
}
|
}
|
|
return 0;
|
|
err_no_mem2:
|
dma_free_coherent(dev, FLAG_SIZE, ctx->flag1_buf,
|
ctx->flag1_buf_dma);
|
err_no_mem1:
|
pm_runtime_put(dev);
|
err_runtime_get:
|
deinterlace_queue_cleanup(vq, VB2_BUF_STATE_QUEUED);
|
|
return ret;
|
}
|
|
static void deinterlace_stop_streaming(struct vb2_queue *vq)
|
{
|
struct deinterlace_ctx *ctx = vb2_get_drv_priv(vq);
|
|
if (V4L2_TYPE_IS_OUTPUT(vq->type)) {
|
struct device *dev = ctx->dev->dev;
|
|
dma_free_coherent(dev, FLAG_SIZE, ctx->flag1_buf,
|
ctx->flag1_buf_dma);
|
dma_free_coherent(dev, FLAG_SIZE, ctx->flag2_buf,
|
ctx->flag2_buf_dma);
|
|
pm_runtime_put(dev);
|
}
|
|
deinterlace_queue_cleanup(vq, VB2_BUF_STATE_ERROR);
|
}
|
|
static const struct vb2_ops deinterlace_qops = {
|
.queue_setup = deinterlace_queue_setup,
|
.buf_prepare = deinterlace_buf_prepare,
|
.buf_queue = deinterlace_buf_queue,
|
.start_streaming = deinterlace_start_streaming,
|
.stop_streaming = deinterlace_stop_streaming,
|
.wait_prepare = vb2_ops_wait_prepare,
|
.wait_finish = vb2_ops_wait_finish,
|
};
|
|
static int deinterlace_queue_init(void *priv, struct vb2_queue *src_vq,
|
struct vb2_queue *dst_vq)
|
{
|
struct deinterlace_ctx *ctx = priv;
|
int ret;
|
|
src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
|
src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
|
src_vq->drv_priv = ctx;
|
src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
|
src_vq->min_buffers_needed = 1;
|
src_vq->ops = &deinterlace_qops;
|
src_vq->mem_ops = &vb2_dma_contig_memops;
|
src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
|
src_vq->lock = &ctx->dev->dev_mutex;
|
src_vq->dev = ctx->dev->dev;
|
|
ret = vb2_queue_init(src_vq);
|
if (ret)
|
return ret;
|
|
dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
|
dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
|
dst_vq->drv_priv = ctx;
|
dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
|
dst_vq->min_buffers_needed = 2;
|
dst_vq->ops = &deinterlace_qops;
|
dst_vq->mem_ops = &vb2_dma_contig_memops;
|
dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
|
dst_vq->lock = &ctx->dev->dev_mutex;
|
dst_vq->dev = ctx->dev->dev;
|
|
ret = vb2_queue_init(dst_vq);
|
if (ret)
|
return ret;
|
|
return 0;
|
}
|
|
static int deinterlace_open(struct file *file)
|
{
|
struct deinterlace_dev *dev = video_drvdata(file);
|
struct deinterlace_ctx *ctx = NULL;
|
int ret;
|
|
if (mutex_lock_interruptible(&dev->dev_mutex))
|
return -ERESTARTSYS;
|
|
ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
|
if (!ctx) {
|
mutex_unlock(&dev->dev_mutex);
|
return -ENOMEM;
|
}
|
|
/* default output format */
|
ctx->src_fmt.pixelformat = deinterlace_formats[0];
|
ctx->src_fmt.field = V4L2_FIELD_INTERLACED;
|
ctx->src_fmt.width = 640;
|
ctx->src_fmt.height = 480;
|
deinterlace_prepare_format(&ctx->src_fmt);
|
|
/* default capture format */
|
ctx->dst_fmt.pixelformat = deinterlace_formats[0];
|
ctx->dst_fmt.field = V4L2_FIELD_NONE;
|
ctx->dst_fmt.width = 640;
|
ctx->dst_fmt.height = 480;
|
deinterlace_prepare_format(&ctx->dst_fmt);
|
|
v4l2_fh_init(&ctx->fh, video_devdata(file));
|
file->private_data = &ctx->fh;
|
ctx->dev = dev;
|
|
ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
|
&deinterlace_queue_init);
|
if (IS_ERR(ctx->fh.m2m_ctx)) {
|
ret = PTR_ERR(ctx->fh.m2m_ctx);
|
goto err_free;
|
}
|
|
v4l2_fh_add(&ctx->fh);
|
|
mutex_unlock(&dev->dev_mutex);
|
|
return 0;
|
|
err_free:
|
kfree(ctx);
|
mutex_unlock(&dev->dev_mutex);
|
|
return ret;
|
}
|
|
static int deinterlace_release(struct file *file)
|
{
|
struct deinterlace_dev *dev = video_drvdata(file);
|
struct deinterlace_ctx *ctx = container_of(file->private_data,
|
struct deinterlace_ctx, fh);
|
|
mutex_lock(&dev->dev_mutex);
|
|
v4l2_fh_del(&ctx->fh);
|
v4l2_fh_exit(&ctx->fh);
|
v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
|
|
kfree(ctx);
|
|
mutex_unlock(&dev->dev_mutex);
|
|
return 0;
|
}
|
|
static const struct v4l2_file_operations deinterlace_fops = {
|
.owner = THIS_MODULE,
|
.open = deinterlace_open,
|
.release = deinterlace_release,
|
.poll = v4l2_m2m_fop_poll,
|
.unlocked_ioctl = video_ioctl2,
|
.mmap = v4l2_m2m_fop_mmap,
|
};
|
|
static const struct video_device deinterlace_video_device = {
|
.name = DEINTERLACE_NAME,
|
.vfl_dir = VFL_DIR_M2M,
|
.fops = &deinterlace_fops,
|
.ioctl_ops = &deinterlace_ioctl_ops,
|
.minor = -1,
|
.release = video_device_release_empty,
|
.device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING,
|
};
|
|
static const struct v4l2_m2m_ops deinterlace_m2m_ops = {
|
.device_run = deinterlace_device_run,
|
.job_ready = deinterlace_job_ready,
|
.job_abort = deinterlace_job_abort,
|
};
|
|
static int deinterlace_probe(struct platform_device *pdev)
|
{
|
struct deinterlace_dev *dev;
|
struct video_device *vfd;
|
struct resource *res;
|
int irq, ret;
|
|
dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
|
if (!dev)
|
return -ENOMEM;
|
|
dev->vfd = deinterlace_video_device;
|
dev->dev = &pdev->dev;
|
|
irq = platform_get_irq(pdev, 0);
|
if (irq <= 0)
|
return irq;
|
|
ret = devm_request_irq(dev->dev, irq, deinterlace_irq,
|
0, dev_name(dev->dev), dev);
|
if (ret) {
|
dev_err(dev->dev, "Failed to request IRQ\n");
|
|
return ret;
|
}
|
|
ret = of_dma_configure(dev->dev, dev->dev->of_node, true);
|
if (ret)
|
return ret;
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
dev->base = devm_ioremap_resource(&pdev->dev, res);
|
if (IS_ERR(dev->base))
|
return PTR_ERR(dev->base);
|
|
dev->bus_clk = devm_clk_get(dev->dev, "bus");
|
if (IS_ERR(dev->bus_clk)) {
|
dev_err(dev->dev, "Failed to get bus clock\n");
|
|
return PTR_ERR(dev->bus_clk);
|
}
|
|
dev->mod_clk = devm_clk_get(dev->dev, "mod");
|
if (IS_ERR(dev->mod_clk)) {
|
dev_err(dev->dev, "Failed to get mod clock\n");
|
|
return PTR_ERR(dev->mod_clk);
|
}
|
|
dev->ram_clk = devm_clk_get(dev->dev, "ram");
|
if (IS_ERR(dev->ram_clk)) {
|
dev_err(dev->dev, "Failed to get ram clock\n");
|
|
return PTR_ERR(dev->ram_clk);
|
}
|
|
dev->rstc = devm_reset_control_get(dev->dev, NULL);
|
if (IS_ERR(dev->rstc)) {
|
dev_err(dev->dev, "Failed to get reset control\n");
|
|
return PTR_ERR(dev->rstc);
|
}
|
|
mutex_init(&dev->dev_mutex);
|
|
ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
|
if (ret) {
|
dev_err(dev->dev, "Failed to register V4L2 device\n");
|
|
return ret;
|
}
|
|
vfd = &dev->vfd;
|
vfd->lock = &dev->dev_mutex;
|
vfd->v4l2_dev = &dev->v4l2_dev;
|
|
snprintf(vfd->name, sizeof(vfd->name), "%s",
|
deinterlace_video_device.name);
|
video_set_drvdata(vfd, dev);
|
|
ret = video_register_device(vfd, VFL_TYPE_VIDEO, 0);
|
if (ret) {
|
v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
|
|
goto err_v4l2;
|
}
|
|
v4l2_info(&dev->v4l2_dev,
|
"Device registered as /dev/video%d\n", vfd->num);
|
|
dev->m2m_dev = v4l2_m2m_init(&deinterlace_m2m_ops);
|
if (IS_ERR(dev->m2m_dev)) {
|
v4l2_err(&dev->v4l2_dev,
|
"Failed to initialize V4L2 M2M device\n");
|
ret = PTR_ERR(dev->m2m_dev);
|
|
goto err_video;
|
}
|
|
platform_set_drvdata(pdev, dev);
|
|
pm_runtime_enable(dev->dev);
|
|
return 0;
|
|
err_video:
|
video_unregister_device(&dev->vfd);
|
err_v4l2:
|
v4l2_device_unregister(&dev->v4l2_dev);
|
|
return ret;
|
}
|
|
static int deinterlace_remove(struct platform_device *pdev)
|
{
|
struct deinterlace_dev *dev = platform_get_drvdata(pdev);
|
|
v4l2_m2m_release(dev->m2m_dev);
|
video_unregister_device(&dev->vfd);
|
v4l2_device_unregister(&dev->v4l2_dev);
|
|
pm_runtime_force_suspend(&pdev->dev);
|
|
return 0;
|
}
|
|
static int deinterlace_runtime_resume(struct device *device)
|
{
|
struct deinterlace_dev *dev = dev_get_drvdata(device);
|
int ret;
|
|
ret = clk_set_rate_exclusive(dev->mod_clk, 300000000);
|
if (ret) {
|
dev_err(dev->dev, "Failed to set exclusive mod clock rate\n");
|
|
return ret;
|
}
|
|
ret = clk_prepare_enable(dev->bus_clk);
|
if (ret) {
|
dev_err(dev->dev, "Failed to enable bus clock\n");
|
|
goto err_exclusive_rate;
|
}
|
|
ret = clk_prepare_enable(dev->mod_clk);
|
if (ret) {
|
dev_err(dev->dev, "Failed to enable mod clock\n");
|
|
goto err_bus_clk;
|
}
|
|
ret = clk_prepare_enable(dev->ram_clk);
|
if (ret) {
|
dev_err(dev->dev, "Failed to enable ram clock\n");
|
|
goto err_mod_clk;
|
}
|
|
ret = reset_control_deassert(dev->rstc);
|
if (ret) {
|
dev_err(dev->dev, "Failed to apply reset\n");
|
|
goto err_ram_clk;
|
}
|
|
deinterlace_init(dev);
|
|
return 0;
|
|
err_ram_clk:
|
clk_disable_unprepare(dev->ram_clk);
|
err_mod_clk:
|
clk_disable_unprepare(dev->mod_clk);
|
err_bus_clk:
|
clk_disable_unprepare(dev->bus_clk);
|
err_exclusive_rate:
|
clk_rate_exclusive_put(dev->mod_clk);
|
|
return ret;
|
}
|
|
static int deinterlace_runtime_suspend(struct device *device)
|
{
|
struct deinterlace_dev *dev = dev_get_drvdata(device);
|
|
reset_control_assert(dev->rstc);
|
|
clk_disable_unprepare(dev->ram_clk);
|
clk_disable_unprepare(dev->mod_clk);
|
clk_disable_unprepare(dev->bus_clk);
|
clk_rate_exclusive_put(dev->mod_clk);
|
|
return 0;
|
}
|
|
static const struct of_device_id deinterlace_dt_match[] = {
|
{ .compatible = "allwinner,sun8i-h3-deinterlace" },
|
{ /* sentinel */ }
|
};
|
MODULE_DEVICE_TABLE(of, deinterlace_dt_match);
|
|
static const struct dev_pm_ops deinterlace_pm_ops = {
|
.runtime_resume = deinterlace_runtime_resume,
|
.runtime_suspend = deinterlace_runtime_suspend,
|
};
|
|
static struct platform_driver deinterlace_driver = {
|
.probe = deinterlace_probe,
|
.remove = deinterlace_remove,
|
.driver = {
|
.name = DEINTERLACE_NAME,
|
.of_match_table = deinterlace_dt_match,
|
.pm = &deinterlace_pm_ops,
|
},
|
};
|
module_platform_driver(deinterlace_driver);
|
|
MODULE_LICENSE("GPL v2");
|
MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
|
MODULE_DESCRIPTION("Allwinner Deinterlace driver");
|
