// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com>
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*
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* Original author:
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* Ben Collins <bcollins@ubuntu.com>
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*
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* Additional work by:
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* John Brooks <john.brooks@bluecherry.net>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include "solo6x10.h"
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static int multi_p2m;
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module_param(multi_p2m, uint, 0644);
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MODULE_PARM_DESC(multi_p2m,
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"Use multiple P2M DMA channels (default: no, 6010-only)");
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static int desc_mode;
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module_param(desc_mode, uint, 0644);
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MODULE_PARM_DESC(desc_mode,
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"Allow use of descriptor mode DMA (default: no, 6010-only)");
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int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
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void *sys_addr, u32 ext_addr, u32 size,
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int repeat, u32 ext_size)
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{
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dma_addr_t dma_addr;
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int ret;
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if (WARN_ON_ONCE((unsigned long)sys_addr & 0x03))
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return -EINVAL;
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if (WARN_ON_ONCE(!size))
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return -EINVAL;
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dma_addr = pci_map_single(solo_dev->pdev, sys_addr, size,
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wr ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
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if (pci_dma_mapping_error(solo_dev->pdev, dma_addr))
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return -ENOMEM;
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ret = solo_p2m_dma_t(solo_dev, wr, dma_addr, ext_addr, size,
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repeat, ext_size);
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pci_unmap_single(solo_dev->pdev, dma_addr, size,
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wr ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
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return ret;
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}
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/* Mutex must be held for p2m_id before calling this!! */
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int solo_p2m_dma_desc(struct solo_dev *solo_dev,
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struct solo_p2m_desc *desc, dma_addr_t desc_dma,
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int desc_cnt)
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{
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struct solo_p2m_dev *p2m_dev;
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unsigned int timeout;
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unsigned int config = 0;
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int ret = 0;
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unsigned int p2m_id = 0;
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/* Get next ID. According to Softlogic, 6110 has problems on !=0 P2M */
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if (solo_dev->type != SOLO_DEV_6110 && multi_p2m)
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p2m_id = atomic_inc_return(&solo_dev->p2m_count) % SOLO_NR_P2M;
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p2m_dev = &solo_dev->p2m_dev[p2m_id];
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if (mutex_lock_interruptible(&p2m_dev->mutex))
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return -EINTR;
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reinit_completion(&p2m_dev->completion);
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p2m_dev->error = 0;
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if (desc_cnt > 1 && solo_dev->type != SOLO_DEV_6110 && desc_mode) {
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/* For 6010 with more than one desc, we can do a one-shot */
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p2m_dev->desc_count = p2m_dev->desc_idx = 0;
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config = solo_reg_read(solo_dev, SOLO_P2M_CONFIG(p2m_id));
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solo_reg_write(solo_dev, SOLO_P2M_DES_ADR(p2m_id), desc_dma);
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solo_reg_write(solo_dev, SOLO_P2M_DESC_ID(p2m_id), desc_cnt);
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solo_reg_write(solo_dev, SOLO_P2M_CONFIG(p2m_id), config |
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SOLO_P2M_DESC_MODE);
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} else {
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/* For single descriptors and 6110, we need to run each desc */
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p2m_dev->desc_count = desc_cnt;
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p2m_dev->desc_idx = 1;
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p2m_dev->descs = desc;
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solo_reg_write(solo_dev, SOLO_P2M_TAR_ADR(p2m_id),
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desc[1].dma_addr);
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solo_reg_write(solo_dev, SOLO_P2M_EXT_ADR(p2m_id),
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desc[1].ext_addr);
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solo_reg_write(solo_dev, SOLO_P2M_EXT_CFG(p2m_id),
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desc[1].cfg);
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solo_reg_write(solo_dev, SOLO_P2M_CONTROL(p2m_id),
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desc[1].ctrl);
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}
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timeout = wait_for_completion_timeout(&p2m_dev->completion,
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solo_dev->p2m_jiffies);
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if (WARN_ON_ONCE(p2m_dev->error))
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ret = -EIO;
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else if (timeout == 0) {
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solo_dev->p2m_timeouts++;
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ret = -EAGAIN;
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}
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solo_reg_write(solo_dev, SOLO_P2M_CONTROL(p2m_id), 0);
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/* Don't write here for the no_desc_mode case, because config is 0.
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* We can't test no_desc_mode again, it might race. */
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if (desc_cnt > 1 && solo_dev->type != SOLO_DEV_6110 && config)
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solo_reg_write(solo_dev, SOLO_P2M_CONFIG(p2m_id), config);
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mutex_unlock(&p2m_dev->mutex);
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return ret;
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}
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void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
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dma_addr_t dma_addr, u32 ext_addr, u32 size,
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int repeat, u32 ext_size)
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{
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WARN_ON_ONCE(dma_addr & 0x03);
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WARN_ON_ONCE(!size);
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desc->cfg = SOLO_P2M_COPY_SIZE(size >> 2);
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desc->ctrl = SOLO_P2M_BURST_SIZE(SOLO_P2M_BURST_256) |
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(wr ? SOLO_P2M_WRITE : 0) | SOLO_P2M_TRANS_ON;
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if (repeat) {
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desc->cfg |= SOLO_P2M_EXT_INC(ext_size >> 2);
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desc->ctrl |= SOLO_P2M_PCI_INC(size >> 2) |
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SOLO_P2M_REPEAT(repeat);
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}
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desc->dma_addr = dma_addr;
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desc->ext_addr = ext_addr;
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}
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int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
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dma_addr_t dma_addr, u32 ext_addr, u32 size,
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int repeat, u32 ext_size)
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{
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struct solo_p2m_desc desc[2];
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solo_p2m_fill_desc(&desc[1], wr, dma_addr, ext_addr, size, repeat,
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ext_size);
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/* No need for desc_dma since we know it is a single-shot */
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return solo_p2m_dma_desc(solo_dev, desc, 0, 1);
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}
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void solo_p2m_isr(struct solo_dev *solo_dev, int id)
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{
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struct solo_p2m_dev *p2m_dev = &solo_dev->p2m_dev[id];
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struct solo_p2m_desc *desc;
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if (p2m_dev->desc_count <= p2m_dev->desc_idx) {
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complete(&p2m_dev->completion);
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return;
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}
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/* Setup next descriptor */
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p2m_dev->desc_idx++;
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desc = &p2m_dev->descs[p2m_dev->desc_idx];
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solo_reg_write(solo_dev, SOLO_P2M_CONTROL(id), 0);
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solo_reg_write(solo_dev, SOLO_P2M_TAR_ADR(id), desc->dma_addr);
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solo_reg_write(solo_dev, SOLO_P2M_EXT_ADR(id), desc->ext_addr);
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solo_reg_write(solo_dev, SOLO_P2M_EXT_CFG(id), desc->cfg);
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solo_reg_write(solo_dev, SOLO_P2M_CONTROL(id), desc->ctrl);
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}
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void solo_p2m_error_isr(struct solo_dev *solo_dev)
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{
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unsigned int err = solo_reg_read(solo_dev, SOLO_PCI_ERR);
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struct solo_p2m_dev *p2m_dev;
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int i;
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if (!(err & (SOLO_PCI_ERR_P2M | SOLO_PCI_ERR_P2M_DESC)))
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return;
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for (i = 0; i < SOLO_NR_P2M; i++) {
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p2m_dev = &solo_dev->p2m_dev[i];
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p2m_dev->error = 1;
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solo_reg_write(solo_dev, SOLO_P2M_CONTROL(i), 0);
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complete(&p2m_dev->completion);
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}
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}
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void solo_p2m_exit(struct solo_dev *solo_dev)
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{
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int i;
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for (i = 0; i < SOLO_NR_P2M; i++)
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solo_irq_off(solo_dev, SOLO_IRQ_P2M(i));
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}
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static int solo_p2m_test(struct solo_dev *solo_dev, int base, int size)
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{
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u32 *wr_buf;
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u32 *rd_buf;
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int i;
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int ret = -EIO;
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int order = get_order(size);
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wr_buf = (u32 *)__get_free_pages(GFP_KERNEL, order);
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if (wr_buf == NULL)
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return -1;
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rd_buf = (u32 *)__get_free_pages(GFP_KERNEL, order);
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if (rd_buf == NULL) {
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free_pages((unsigned long)wr_buf, order);
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return -1;
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}
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for (i = 0; i < (size >> 3); i++)
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*(wr_buf + i) = (i << 16) | (i + 1);
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for (i = (size >> 3); i < (size >> 2); i++)
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*(wr_buf + i) = ~((i << 16) | (i + 1));
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memset(rd_buf, 0x55, size);
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if (solo_p2m_dma(solo_dev, 1, wr_buf, base, size, 0, 0))
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goto test_fail;
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if (solo_p2m_dma(solo_dev, 0, rd_buf, base, size, 0, 0))
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goto test_fail;
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for (i = 0; i < (size >> 2); i++) {
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if (*(wr_buf + i) != *(rd_buf + i))
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goto test_fail;
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}
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ret = 0;
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test_fail:
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free_pages((unsigned long)wr_buf, order);
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free_pages((unsigned long)rd_buf, order);
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return ret;
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}
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int solo_p2m_init(struct solo_dev *solo_dev)
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{
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struct solo_p2m_dev *p2m_dev;
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int i;
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for (i = 0; i < SOLO_NR_P2M; i++) {
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p2m_dev = &solo_dev->p2m_dev[i];
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mutex_init(&p2m_dev->mutex);
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init_completion(&p2m_dev->completion);
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solo_reg_write(solo_dev, SOLO_P2M_CONTROL(i), 0);
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solo_reg_write(solo_dev, SOLO_P2M_CONFIG(i),
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SOLO_P2M_CSC_16BIT_565 |
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SOLO_P2M_DESC_INTR_OPT |
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SOLO_P2M_DMA_INTERVAL(0) |
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SOLO_P2M_PCI_MASTER_MODE);
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solo_irq_on(solo_dev, SOLO_IRQ_P2M(i));
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}
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/* Find correct SDRAM size */
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for (solo_dev->sdram_size = 0, i = 2; i >= 0; i--) {
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solo_reg_write(solo_dev, SOLO_DMA_CTRL,
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SOLO_DMA_CTRL_REFRESH_CYCLE(1) |
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SOLO_DMA_CTRL_SDRAM_SIZE(i) |
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SOLO_DMA_CTRL_SDRAM_CLK_INVERT |
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SOLO_DMA_CTRL_READ_CLK_SELECT |
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SOLO_DMA_CTRL_LATENCY(1));
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solo_reg_write(solo_dev, SOLO_SYS_CFG, solo_dev->sys_config |
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SOLO_SYS_CFG_RESET);
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solo_reg_write(solo_dev, SOLO_SYS_CFG, solo_dev->sys_config);
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switch (i) {
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case 2:
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if (solo_p2m_test(solo_dev, 0x07ff0000, 0x00010000) ||
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solo_p2m_test(solo_dev, 0x05ff0000, 0x00010000))
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continue;
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break;
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case 1:
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if (solo_p2m_test(solo_dev, 0x03ff0000, 0x00010000))
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continue;
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break;
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default:
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if (solo_p2m_test(solo_dev, 0x01ff0000, 0x00010000))
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continue;
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}
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solo_dev->sdram_size = (32 << 20) << i;
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break;
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}
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if (!solo_dev->sdram_size) {
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dev_err(&solo_dev->pdev->dev, "Error detecting SDRAM size\n");
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return -EIO;
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}
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if (SOLO_SDRAM_END(solo_dev) > solo_dev->sdram_size) {
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dev_err(&solo_dev->pdev->dev,
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"SDRAM is not large enough (%u < %u)\n",
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solo_dev->sdram_size, SOLO_SDRAM_END(solo_dev));
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return -EIO;
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}
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return 0;
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}
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