// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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Mantis PCI bridge driver
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Copyright (C) Manu Abraham (abraham.manu@gmail.com)
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*/
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <asm/io.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <media/dmxdev.h>
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#include <media/dvbdev.h>
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#include <media/dvb_demux.h>
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#include <media/dvb_frontend.h>
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#include <media/dvb_net.h>
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#include "mantis_common.h"
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#include "mantis_reg.h"
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#include "mantis_uart.h"
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#include "mantis_input.h"
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struct mantis_uart_params {
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enum mantis_baud baud_rate;
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enum mantis_parity parity;
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};
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static struct {
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char string[7];
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} rates[5] = {
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{ "9600" },
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{ "19200" },
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{ "38400" },
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{ "57600" },
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{ "115200" }
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};
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static struct {
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char string[5];
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} parity[3] = {
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{ "NONE" },
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{ "ODD" },
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{ "EVEN" }
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};
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static void mantis_uart_read(struct mantis_pci *mantis)
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{
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struct mantis_hwconfig *config = mantis->hwconfig;
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int i, scancode = 0, err = 0;
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/* get data */
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dprintk(MANTIS_DEBUG, 1, "UART Reading ...");
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for (i = 0; i < (config->bytes + 1); i++) {
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int data = mmread(MANTIS_UART_RXD);
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dprintk(MANTIS_DEBUG, 0, " <%02x>", data);
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scancode = (scancode << 8) | (data & 0x3f);
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err |= data;
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if (data & (1 << 7))
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dprintk(MANTIS_ERROR, 1, "UART framing error");
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if (data & (1 << 6))
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dprintk(MANTIS_ERROR, 1, "UART parity error");
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}
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dprintk(MANTIS_DEBUG, 0, "\n");
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if ((err & 0xC0) == 0)
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mantis_input_process(mantis, scancode);
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}
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static void mantis_uart_work(struct work_struct *work)
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{
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struct mantis_pci *mantis = container_of(work, struct mantis_pci, uart_work);
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u32 stat;
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unsigned long timeout;
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stat = mmread(MANTIS_UART_STAT);
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if (stat & MANTIS_UART_RXFIFO_FULL)
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dprintk(MANTIS_ERROR, 1, "RX Fifo FULL");
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/*
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* MANTIS_UART_RXFIFO_DATA is only set if at least
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* config->bytes + 1 bytes are in the FIFO.
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*/
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/* FIXME: is 10ms good enough ? */
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timeout = jiffies + msecs_to_jiffies(10);
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while (stat & MANTIS_UART_RXFIFO_DATA) {
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mantis_uart_read(mantis);
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stat = mmread(MANTIS_UART_STAT);
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if (!time_is_after_jiffies(timeout))
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break;
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}
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/* re-enable UART (RX) interrupt */
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mantis_unmask_ints(mantis, MANTIS_INT_IRQ1);
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}
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static int mantis_uart_setup(struct mantis_pci *mantis,
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struct mantis_uart_params *params)
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{
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u32 reg;
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mmwrite((mmread(MANTIS_UART_CTL) | (params->parity & 0x3)), MANTIS_UART_CTL);
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reg = mmread(MANTIS_UART_BAUD);
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switch (params->baud_rate) {
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case MANTIS_BAUD_9600:
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reg |= 0xd8;
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break;
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case MANTIS_BAUD_19200:
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reg |= 0x6c;
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break;
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case MANTIS_BAUD_38400:
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reg |= 0x36;
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break;
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case MANTIS_BAUD_57600:
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reg |= 0x23;
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break;
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case MANTIS_BAUD_115200:
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reg |= 0x11;
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break;
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default:
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return -EINVAL;
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}
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mmwrite(reg, MANTIS_UART_BAUD);
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return 0;
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}
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int mantis_uart_init(struct mantis_pci *mantis)
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{
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struct mantis_hwconfig *config = mantis->hwconfig;
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struct mantis_uart_params params;
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/* default parity: */
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params.baud_rate = config->baud_rate;
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params.parity = config->parity;
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dprintk(MANTIS_INFO, 1, "Initializing UART @ %sbps parity:%s",
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rates[params.baud_rate].string,
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parity[params.parity].string);
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INIT_WORK(&mantis->uart_work, mantis_uart_work);
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/* disable interrupt */
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mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
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mantis_uart_setup(mantis, ¶ms);
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/* default 1 byte */
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mmwrite((mmread(MANTIS_UART_BAUD) | (config->bytes << 8)), MANTIS_UART_BAUD);
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/* flush buffer */
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mmwrite((mmread(MANTIS_UART_CTL) | MANTIS_UART_RXFLUSH), MANTIS_UART_CTL);
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/* enable interrupt */
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mmwrite(mmread(MANTIS_UART_CTL) | MANTIS_UART_RXINT, MANTIS_UART_CTL);
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mantis_unmask_ints(mantis, MANTIS_INT_IRQ1);
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schedule_work(&mantis->uart_work);
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dprintk(MANTIS_DEBUG, 1, "UART successfully initialized");
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return 0;
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}
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EXPORT_SYMBOL_GPL(mantis_uart_init);
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void mantis_uart_exit(struct mantis_pci *mantis)
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{
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/* disable interrupt */
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mantis_mask_ints(mantis, MANTIS_INT_IRQ1);
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mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
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flush_work(&mantis->uart_work);
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}
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EXPORT_SYMBOL_GPL(mantis_uart_exit);
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