// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* altera-ci.c
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*
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* CI driver in conjunction with NetUp Dual DVB-T/C RF CI card
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*
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* Copyright (C) 2010,2011 NetUP Inc.
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* Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru>
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*/
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/*
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* currently cx23885 GPIO's used.
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* GPIO-0 ~INT in
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* GPIO-1 TMS out
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* GPIO-2 ~reset chips out
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* GPIO-3 to GPIO-10 data/addr for CA in/out
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* GPIO-11 ~CS out
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* GPIO-12 AD_RG out
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* GPIO-13 ~WR out
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* GPIO-14 ~RD out
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* GPIO-15 ~RDY in
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* GPIO-16 TCK out
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* GPIO-17 TDO in
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* GPIO-18 TDI out
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*/
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/*
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* Bit definitions for MC417_RWD and MC417_OEN registers
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* bits 31-16
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* +-----------+
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* | Reserved |
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* +-----------+
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* bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
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* +-------+-------+-------+-------+-------+-------+-------+-------+
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* | TDI | TDO | TCK | RDY# | #RD | #WR | AD_RG | #CS |
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* +-------+-------+-------+-------+-------+-------+-------+-------+
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* bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
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* +-------+-------+-------+-------+-------+-------+-------+-------+
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* | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0|
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* +-------+-------+-------+-------+-------+-------+-------+-------+
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <media/dvb_demux.h>
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#include <media/dvb_frontend.h>
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#include "altera-ci.h"
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#include <media/dvb_ca_en50221.h>
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/* FPGA regs */
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#define NETUP_CI_INT_CTRL 0x00
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#define NETUP_CI_BUSCTRL2 0x01
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#define NETUP_CI_ADDR0 0x04
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#define NETUP_CI_ADDR1 0x05
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#define NETUP_CI_DATA 0x06
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#define NETUP_CI_BUSCTRL 0x07
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#define NETUP_CI_PID_ADDR0 0x08
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#define NETUP_CI_PID_ADDR1 0x09
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#define NETUP_CI_PID_DATA 0x0a
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#define NETUP_CI_TSA_DIV 0x0c
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#define NETUP_CI_TSB_DIV 0x0d
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#define NETUP_CI_REVISION 0x0f
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/* const for ci op */
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#define NETUP_CI_FLG_CTL 1
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#define NETUP_CI_FLG_RD 1
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#define NETUP_CI_FLG_AD 1
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static unsigned int ci_dbg;
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module_param(ci_dbg, int, 0644);
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MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
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static unsigned int pid_dbg;
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module_param(pid_dbg, int, 0644);
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MODULE_PARM_DESC(pid_dbg, "Enable PID filtering debugging");
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MODULE_DESCRIPTION("altera FPGA CI module");
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MODULE_AUTHOR("Igor M. Liplianin <liplianin@netup.ru>");
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MODULE_LICENSE("GPL");
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#define ci_dbg_print(fmt, args...) \
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do { \
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if (ci_dbg) \
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printk(KERN_DEBUG pr_fmt("%s: " fmt), \
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__func__, ##args); \
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} while (0)
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#define pid_dbg_print(fmt, args...) \
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do { \
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if (pid_dbg) \
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printk(KERN_DEBUG pr_fmt("%s: " fmt), \
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__func__, ##args); \
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} while (0)
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struct altera_ci_state;
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struct netup_hw_pid_filter;
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struct fpga_internal {
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void *dev;
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struct mutex fpga_mutex;/* two CI's on the same fpga */
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struct netup_hw_pid_filter *pid_filt[2];
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struct altera_ci_state *state[2];
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struct work_struct work;
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int (*fpga_rw) (void *dev, int flag, int data, int rw);
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int cis_used;
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int filts_used;
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int strt_wrk;
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};
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/* stores all private variables for communication with CI */
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struct altera_ci_state {
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struct fpga_internal *internal;
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struct dvb_ca_en50221 ca;
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int status;
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int nr;
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};
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/* stores all private variables for hardware pid filtering */
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struct netup_hw_pid_filter {
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struct fpga_internal *internal;
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struct dvb_demux *demux;
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/* save old functions */
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int (*start_feed)(struct dvb_demux_feed *feed);
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int (*stop_feed)(struct dvb_demux_feed *feed);
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int status;
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int nr;
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};
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/* internal params node */
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struct fpga_inode {
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/* pointer for internal params, one for each pair of CI's */
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struct fpga_internal *internal;
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struct fpga_inode *next_inode;
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};
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/* first internal params */
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static struct fpga_inode *fpga_first_inode;
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/* find chip by dev */
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static struct fpga_inode *find_inode(void *dev)
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{
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struct fpga_inode *temp_chip = fpga_first_inode;
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if (temp_chip == NULL)
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return temp_chip;
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/*
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Search for the last fpga CI chip or
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find it by dev */
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while ((temp_chip != NULL) &&
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(temp_chip->internal->dev != dev))
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temp_chip = temp_chip->next_inode;
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return temp_chip;
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}
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/* check demux */
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static struct fpga_internal *check_filter(struct fpga_internal *temp_int,
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void *demux_dev, int filt_nr)
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{
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if (temp_int == NULL)
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return NULL;
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if ((temp_int->pid_filt[filt_nr]) == NULL)
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return NULL;
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if (temp_int->pid_filt[filt_nr]->demux == demux_dev)
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return temp_int;
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return NULL;
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}
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/* find chip by demux */
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static struct fpga_inode *find_dinode(void *demux_dev)
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{
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struct fpga_inode *temp_chip = fpga_first_inode;
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struct fpga_internal *temp_int;
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/*
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* Search of the last fpga CI chip or
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* find it by demux
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*/
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while (temp_chip != NULL) {
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if (temp_chip->internal != NULL) {
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temp_int = temp_chip->internal;
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if (check_filter(temp_int, demux_dev, 0))
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break;
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if (check_filter(temp_int, demux_dev, 1))
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break;
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}
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temp_chip = temp_chip->next_inode;
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}
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return temp_chip;
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}
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/* deallocating chip */
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static void remove_inode(struct fpga_internal *internal)
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{
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struct fpga_inode *prev_node = fpga_first_inode;
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struct fpga_inode *del_node = find_inode(internal->dev);
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if (del_node != NULL) {
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if (del_node == fpga_first_inode) {
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fpga_first_inode = del_node->next_inode;
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} else {
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while (prev_node->next_inode != del_node)
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prev_node = prev_node->next_inode;
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if (del_node->next_inode == NULL)
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prev_node->next_inode = NULL;
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else
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prev_node->next_inode =
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prev_node->next_inode->next_inode;
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}
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kfree(del_node);
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}
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}
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/* allocating new chip */
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static struct fpga_inode *append_internal(struct fpga_internal *internal)
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{
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struct fpga_inode *new_node = fpga_first_inode;
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if (new_node == NULL) {
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new_node = kmalloc(sizeof(struct fpga_inode), GFP_KERNEL);
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fpga_first_inode = new_node;
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} else {
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while (new_node->next_inode != NULL)
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new_node = new_node->next_inode;
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new_node->next_inode =
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kmalloc(sizeof(struct fpga_inode), GFP_KERNEL);
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if (new_node->next_inode != NULL)
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new_node = new_node->next_inode;
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else
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new_node = NULL;
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}
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if (new_node != NULL) {
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new_node->internal = internal;
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new_node->next_inode = NULL;
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}
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return new_node;
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}
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static int netup_fpga_op_rw(struct fpga_internal *inter, int addr,
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u8 val, u8 read)
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{
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inter->fpga_rw(inter->dev, NETUP_CI_FLG_AD, addr, 0);
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return inter->fpga_rw(inter->dev, 0, val, read);
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}
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/* flag - mem/io, read - read/write */
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static int altera_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
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u8 flag, u8 read, int addr, u8 val)
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{
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struct altera_ci_state *state = en50221->data;
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struct fpga_internal *inter = state->internal;
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u8 store;
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int mem = 0;
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if (0 != slot)
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return -EINVAL;
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mutex_lock(&inter->fpga_mutex);
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netup_fpga_op_rw(inter, NETUP_CI_ADDR0, ((addr << 1) & 0xfe), 0);
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netup_fpga_op_rw(inter, NETUP_CI_ADDR1, ((addr >> 7) & 0x7f), 0);
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store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
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store &= 0x0f;
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store |= ((state->nr << 7) | (flag << 6));
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netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, store, 0);
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mem = netup_fpga_op_rw(inter, NETUP_CI_DATA, val, read);
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mutex_unlock(&inter->fpga_mutex);
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ci_dbg_print("%s: %s: addr=[0x%02x], %s=%x\n", __func__,
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(read) ? "read" : "write", addr,
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(flag == NETUP_CI_FLG_CTL) ? "ctl" : "mem",
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(read) ? mem : val);
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return mem;
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}
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static int altera_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
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int slot, int addr)
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{
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return altera_ci_op_cam(en50221, slot, 0, NETUP_CI_FLG_RD, addr, 0);
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}
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static int altera_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
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int slot, int addr, u8 data)
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{
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return altera_ci_op_cam(en50221, slot, 0, 0, addr, data);
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}
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static int altera_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221,
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int slot, u8 addr)
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{
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return altera_ci_op_cam(en50221, slot, NETUP_CI_FLG_CTL,
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NETUP_CI_FLG_RD, addr, 0);
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}
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static int altera_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
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u8 addr, u8 data)
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{
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return altera_ci_op_cam(en50221, slot, NETUP_CI_FLG_CTL, 0, addr, data);
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}
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static int altera_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
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{
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struct altera_ci_state *state = en50221->data;
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struct fpga_internal *inter = state->internal;
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/* reasonable timeout for CI reset is 10 seconds */
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unsigned long t_out = jiffies + msecs_to_jiffies(9999);
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int ret;
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ci_dbg_print("%s\n", __func__);
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if (0 != slot)
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return -EINVAL;
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mutex_lock(&inter->fpga_mutex);
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ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
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netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
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(ret & 0xcf) | (1 << (5 - state->nr)), 0);
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mutex_unlock(&inter->fpga_mutex);
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for (;;) {
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msleep(50);
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mutex_lock(&inter->fpga_mutex);
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ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
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0, NETUP_CI_FLG_RD);
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mutex_unlock(&inter->fpga_mutex);
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if ((ret & (1 << (5 - state->nr))) == 0)
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break;
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if (time_after(jiffies, t_out))
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break;
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}
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ci_dbg_print("%s: %d msecs\n", __func__,
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jiffies_to_msecs(jiffies + msecs_to_jiffies(9999) - t_out));
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return 0;
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}
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static int altera_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
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{
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/* not implemented */
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return 0;
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}
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static int altera_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
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{
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struct altera_ci_state *state = en50221->data;
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struct fpga_internal *inter = state->internal;
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int ret;
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ci_dbg_print("%s\n", __func__);
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if (0 != slot)
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return -EINVAL;
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mutex_lock(&inter->fpga_mutex);
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ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
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netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
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(ret & 0x0f) | (1 << (3 - state->nr)), 0);
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mutex_unlock(&inter->fpga_mutex);
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return 0;
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}
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/* work handler */
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static void netup_read_ci_status(struct work_struct *work)
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{
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struct fpga_internal *inter =
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container_of(work, struct fpga_internal, work);
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int ret;
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ci_dbg_print("%s\n", __func__);
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mutex_lock(&inter->fpga_mutex);
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/* ack' irq */
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ret = netup_fpga_op_rw(inter, NETUP_CI_INT_CTRL, 0, NETUP_CI_FLG_RD);
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ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
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mutex_unlock(&inter->fpga_mutex);
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if (inter->state[1] != NULL) {
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inter->state[1]->status =
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((ret & 1) == 0 ?
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DVB_CA_EN50221_POLL_CAM_PRESENT |
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DVB_CA_EN50221_POLL_CAM_READY : 0);
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ci_dbg_print("%s: setting CI[1] status = 0x%x\n",
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__func__, inter->state[1]->status);
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}
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if (inter->state[0] != NULL) {
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inter->state[0]->status =
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((ret & 2) == 0 ?
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DVB_CA_EN50221_POLL_CAM_PRESENT |
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DVB_CA_EN50221_POLL_CAM_READY : 0);
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ci_dbg_print("%s: setting CI[0] status = 0x%x\n",
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__func__, inter->state[0]->status);
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}
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}
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/* CI irq handler */
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int altera_ci_irq(void *dev)
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{
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struct fpga_inode *temp_int = NULL;
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struct fpga_internal *inter = NULL;
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ci_dbg_print("%s\n", __func__);
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if (dev != NULL) {
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temp_int = find_inode(dev);
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if (temp_int != NULL) {
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inter = temp_int->internal;
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schedule_work(&inter->work);
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}
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}
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return 1;
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}
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EXPORT_SYMBOL(altera_ci_irq);
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static int altera_poll_ci_slot_status(struct dvb_ca_en50221 *en50221,
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int slot, int open)
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{
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struct altera_ci_state *state = en50221->data;
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if (0 != slot)
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return -EINVAL;
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return state->status;
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}
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static void altera_hw_filt_release(void *main_dev, int filt_nr)
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{
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struct fpga_inode *temp_int = find_inode(main_dev);
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struct netup_hw_pid_filter *pid_filt = NULL;
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ci_dbg_print("%s\n", __func__);
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if (temp_int != NULL) {
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pid_filt = temp_int->internal->pid_filt[filt_nr - 1];
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/* stored old feed controls */
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pid_filt->demux->start_feed = pid_filt->start_feed;
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pid_filt->demux->stop_feed = pid_filt->stop_feed;
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if (((--(temp_int->internal->filts_used)) <= 0) &&
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((temp_int->internal->cis_used) <= 0)) {
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ci_dbg_print("%s: Actually removing\n", __func__);
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remove_inode(temp_int->internal);
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kfree(pid_filt->internal);
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}
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kfree(pid_filt);
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}
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}
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void altera_ci_release(void *dev, int ci_nr)
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{
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struct fpga_inode *temp_int = find_inode(dev);
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struct altera_ci_state *state = NULL;
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ci_dbg_print("%s\n", __func__);
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if (temp_int != NULL) {
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state = temp_int->internal->state[ci_nr - 1];
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altera_hw_filt_release(dev, ci_nr);
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if (((temp_int->internal->filts_used) <= 0) &&
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((--(temp_int->internal->cis_used)) <= 0)) {
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ci_dbg_print("%s: Actually removing\n", __func__);
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remove_inode(temp_int->internal);
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kfree(state->internal);
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}
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if (state != NULL) {
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if (state->ca.data != NULL)
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dvb_ca_en50221_release(&state->ca);
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kfree(state);
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}
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}
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}
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EXPORT_SYMBOL(altera_ci_release);
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static void altera_pid_control(struct netup_hw_pid_filter *pid_filt,
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u16 pid, int onoff)
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{
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struct fpga_internal *inter = pid_filt->internal;
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u8 store = 0;
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/* pid 0-0x1f always enabled, don't touch them */
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if ((pid == 0x2000) || (pid < 0x20))
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return;
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mutex_lock(&inter->fpga_mutex);
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netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR0, (pid >> 3) & 0xff, 0);
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netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR1,
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((pid >> 11) & 0x03) | (pid_filt->nr << 2), 0);
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store = netup_fpga_op_rw(inter, NETUP_CI_PID_DATA, 0, NETUP_CI_FLG_RD);
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if (onoff)/* 0 - on, 1 - off */
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store |= (1 << (pid & 7));
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else
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store &= ~(1 << (pid & 7));
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netup_fpga_op_rw(inter, NETUP_CI_PID_DATA, store, 0);
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|
mutex_unlock(&inter->fpga_mutex);
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pid_dbg_print("%s: (%d) set pid: %5d 0x%04x '%s'\n", __func__,
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pid_filt->nr, pid, pid, onoff ? "off" : "on");
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}
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static void altera_toggle_fullts_streaming(struct netup_hw_pid_filter *pid_filt,
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int filt_nr, int onoff)
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{
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struct fpga_internal *inter = pid_filt->internal;
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u8 store = 0;
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int i;
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pid_dbg_print("%s: pid_filt->nr[%d] now %s\n", __func__, pid_filt->nr,
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onoff ? "off" : "on");
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|
if (onoff)/* 0 - on, 1 - off */
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store = 0xff;/* ignore pid */
|
else
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store = 0;/* enable pid */
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mutex_lock(&inter->fpga_mutex);
|
|
for (i = 0; i < 1024; i++) {
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netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR0, i & 0xff, 0);
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|
netup_fpga_op_rw(inter, NETUP_CI_PID_ADDR1,
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((i >> 8) & 0x03) | (pid_filt->nr << 2), 0);
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/* pid 0-0x1f always enabled */
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netup_fpga_op_rw(inter, NETUP_CI_PID_DATA,
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(i > 3 ? store : 0), 0);
|
}
|
|
mutex_unlock(&inter->fpga_mutex);
|
}
|
|
static int altera_pid_feed_control(void *demux_dev, int filt_nr,
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struct dvb_demux_feed *feed, int onoff)
|
{
|
struct fpga_inode *temp_int = find_dinode(demux_dev);
|
struct fpga_internal *inter = temp_int->internal;
|
struct netup_hw_pid_filter *pid_filt = inter->pid_filt[filt_nr - 1];
|
|
altera_pid_control(pid_filt, feed->pid, onoff ? 0 : 1);
|
/* call old feed proc's */
|
if (onoff)
|
pid_filt->start_feed(feed);
|
else
|
pid_filt->stop_feed(feed);
|
|
if (feed->pid == 0x2000)
|
altera_toggle_fullts_streaming(pid_filt, filt_nr,
|
onoff ? 0 : 1);
|
|
return 0;
|
}
|
|
static int altera_ci_start_feed(struct dvb_demux_feed *feed, int num)
|
{
|
altera_pid_feed_control(feed->demux, num, feed, 1);
|
|
return 0;
|
}
|
|
static int altera_ci_stop_feed(struct dvb_demux_feed *feed, int num)
|
{
|
altera_pid_feed_control(feed->demux, num, feed, 0);
|
|
return 0;
|
}
|
|
static int altera_ci_start_feed_1(struct dvb_demux_feed *feed)
|
{
|
return altera_ci_start_feed(feed, 1);
|
}
|
|
static int altera_ci_stop_feed_1(struct dvb_demux_feed *feed)
|
{
|
return altera_ci_stop_feed(feed, 1);
|
}
|
|
static int altera_ci_start_feed_2(struct dvb_demux_feed *feed)
|
{
|
return altera_ci_start_feed(feed, 2);
|
}
|
|
static int altera_ci_stop_feed_2(struct dvb_demux_feed *feed)
|
{
|
return altera_ci_stop_feed(feed, 2);
|
}
|
|
static int altera_hw_filt_init(struct altera_ci_config *config, int hw_filt_nr)
|
{
|
struct netup_hw_pid_filter *pid_filt = NULL;
|
struct fpga_inode *temp_int = find_inode(config->dev);
|
struct fpga_internal *inter = NULL;
|
int ret = 0;
|
|
pid_filt = kzalloc(sizeof(struct netup_hw_pid_filter), GFP_KERNEL);
|
|
ci_dbg_print("%s\n", __func__);
|
|
if (!pid_filt) {
|
ret = -ENOMEM;
|
goto err;
|
}
|
|
if (temp_int != NULL) {
|
inter = temp_int->internal;
|
(inter->filts_used)++;
|
ci_dbg_print("%s: Find Internal Structure!\n", __func__);
|
} else {
|
inter = kzalloc(sizeof(struct fpga_internal), GFP_KERNEL);
|
if (!inter) {
|
ret = -ENOMEM;
|
goto err;
|
}
|
|
temp_int = append_internal(inter);
|
if (!temp_int) {
|
ret = -ENOMEM;
|
goto err;
|
}
|
inter->filts_used = 1;
|
inter->dev = config->dev;
|
inter->fpga_rw = config->fpga_rw;
|
mutex_init(&inter->fpga_mutex);
|
inter->strt_wrk = 1;
|
ci_dbg_print("%s: Create New Internal Structure!\n", __func__);
|
}
|
|
ci_dbg_print("%s: setting hw pid filter = %p for ci = %d\n", __func__,
|
pid_filt, hw_filt_nr - 1);
|
inter->pid_filt[hw_filt_nr - 1] = pid_filt;
|
pid_filt->demux = config->demux;
|
pid_filt->internal = inter;
|
pid_filt->nr = hw_filt_nr - 1;
|
/* store old feed controls */
|
pid_filt->start_feed = config->demux->start_feed;
|
pid_filt->stop_feed = config->demux->stop_feed;
|
/* replace with new feed controls */
|
if (hw_filt_nr == 1) {
|
pid_filt->demux->start_feed = altera_ci_start_feed_1;
|
pid_filt->demux->stop_feed = altera_ci_stop_feed_1;
|
} else if (hw_filt_nr == 2) {
|
pid_filt->demux->start_feed = altera_ci_start_feed_2;
|
pid_filt->demux->stop_feed = altera_ci_stop_feed_2;
|
}
|
|
altera_toggle_fullts_streaming(pid_filt, 0, 1);
|
|
return 0;
|
err:
|
ci_dbg_print("%s: Can't init hardware filter: Error %d\n",
|
__func__, ret);
|
|
kfree(pid_filt);
|
kfree(inter);
|
|
return ret;
|
}
|
|
int altera_ci_init(struct altera_ci_config *config, int ci_nr)
|
{
|
struct altera_ci_state *state;
|
struct fpga_inode *temp_int = find_inode(config->dev);
|
struct fpga_internal *inter = NULL;
|
int ret = 0;
|
u8 store = 0;
|
|
state = kzalloc(sizeof(struct altera_ci_state), GFP_KERNEL);
|
|
ci_dbg_print("%s\n", __func__);
|
|
if (!state) {
|
ret = -ENOMEM;
|
goto err;
|
}
|
|
if (temp_int != NULL) {
|
inter = temp_int->internal;
|
(inter->cis_used)++;
|
inter->fpga_rw = config->fpga_rw;
|
ci_dbg_print("%s: Find Internal Structure!\n", __func__);
|
} else {
|
inter = kzalloc(sizeof(struct fpga_internal), GFP_KERNEL);
|
if (!inter) {
|
ret = -ENOMEM;
|
goto err;
|
}
|
|
temp_int = append_internal(inter);
|
if (!temp_int) {
|
ret = -ENOMEM;
|
goto err;
|
}
|
inter->cis_used = 1;
|
inter->dev = config->dev;
|
inter->fpga_rw = config->fpga_rw;
|
mutex_init(&inter->fpga_mutex);
|
inter->strt_wrk = 1;
|
ci_dbg_print("%s: Create New Internal Structure!\n", __func__);
|
}
|
|
ci_dbg_print("%s: setting state = %p for ci = %d\n", __func__,
|
state, ci_nr - 1);
|
state->internal = inter;
|
state->nr = ci_nr - 1;
|
|
state->ca.owner = THIS_MODULE;
|
state->ca.read_attribute_mem = altera_ci_read_attribute_mem;
|
state->ca.write_attribute_mem = altera_ci_write_attribute_mem;
|
state->ca.read_cam_control = altera_ci_read_cam_ctl;
|
state->ca.write_cam_control = altera_ci_write_cam_ctl;
|
state->ca.slot_reset = altera_ci_slot_reset;
|
state->ca.slot_shutdown = altera_ci_slot_shutdown;
|
state->ca.slot_ts_enable = altera_ci_slot_ts_ctl;
|
state->ca.poll_slot_status = altera_poll_ci_slot_status;
|
state->ca.data = state;
|
|
ret = dvb_ca_en50221_init(config->adapter,
|
&state->ca,
|
/* flags */ 0,
|
/* n_slots */ 1);
|
if (0 != ret)
|
goto err;
|
|
inter->state[ci_nr - 1] = state;
|
|
altera_hw_filt_init(config, ci_nr);
|
|
if (inter->strt_wrk) {
|
INIT_WORK(&inter->work, netup_read_ci_status);
|
inter->strt_wrk = 0;
|
}
|
|
ci_dbg_print("%s: CI initialized!\n", __func__);
|
|
mutex_lock(&inter->fpga_mutex);
|
|
/* Enable div */
|
netup_fpga_op_rw(inter, NETUP_CI_TSA_DIV, 0x0, 0);
|
netup_fpga_op_rw(inter, NETUP_CI_TSB_DIV, 0x0, 0);
|
|
/* enable TS out */
|
store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, 0, NETUP_CI_FLG_RD);
|
store |= (3 << 4);
|
netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, store, 0);
|
|
ret = netup_fpga_op_rw(inter, NETUP_CI_REVISION, 0, NETUP_CI_FLG_RD);
|
/* enable irq */
|
netup_fpga_op_rw(inter, NETUP_CI_INT_CTRL, 0x44, 0);
|
|
mutex_unlock(&inter->fpga_mutex);
|
|
ci_dbg_print("%s: NetUP CI Revision = 0x%x\n", __func__, ret);
|
|
schedule_work(&inter->work);
|
|
return 0;
|
err:
|
ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
|
|
kfree(state);
|
kfree(inter);
|
|
return ret;
|
}
|
EXPORT_SYMBOL(altera_ci_init);
|
|
int altera_ci_tuner_reset(void *dev, int ci_nr)
|
{
|
struct fpga_inode *temp_int = find_inode(dev);
|
struct fpga_internal *inter = NULL;
|
u8 store;
|
|
ci_dbg_print("%s\n", __func__);
|
|
if (temp_int == NULL)
|
return -1;
|
|
if (temp_int->internal == NULL)
|
return -1;
|
|
inter = temp_int->internal;
|
|
mutex_lock(&inter->fpga_mutex);
|
|
store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, 0, NETUP_CI_FLG_RD);
|
store &= ~(4 << (2 - ci_nr));
|
netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, store, 0);
|
msleep(100);
|
store |= (4 << (2 - ci_nr));
|
netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, store, 0);
|
|
mutex_unlock(&inter->fpga_mutex);
|
|
return 0;
|
}
|
EXPORT_SYMBOL(altera_ci_tuner_reset);
|
