// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* cx18 mailbox functions
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*
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* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
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* Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
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*/
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#include <linux/bitops.h>
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#include "cx18-driver.h"
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#include "cx18-io.h"
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#include "cx18-scb.h"
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#include "cx18-irq.h"
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#include "cx18-mailbox.h"
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#include "cx18-queue.h"
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#include "cx18-streams.h"
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#include "cx18-alsa-pcm.h" /* FIXME make configurable */
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|
static const char *rpu_str[] = { "APU", "CPU", "EPU", "HPU" };
|
|
#define API_FAST (1 << 2) /* Short timeout */
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#define API_SLOW (1 << 3) /* Additional 300ms timeout */
|
|
struct cx18_api_info {
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u32 cmd;
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u8 flags; /* Flags, see above */
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u8 rpu; /* Processing unit */
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const char *name; /* The name of the command */
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};
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#define API_ENTRY(rpu, x, f) { (x), (f), (rpu), #x }
|
|
static const struct cx18_api_info api_info[] = {
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/* MPEG encoder API */
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API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
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API_ENTRY(CPU, CX18_EPU_DEBUG, 0),
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API_ENTRY(CPU, CX18_CREATE_TASK, 0),
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API_ENTRY(CPU, CX18_DESTROY_TASK, 0),
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API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW),
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API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW),
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API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0),
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API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0),
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API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
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API_ENTRY(CPU, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 0),
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API_ENTRY(CPU, CX18_CPU_SET_VIDEO_IN, 0),
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API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RATE, 0),
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API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RESOLUTION, 0),
|
API_ENTRY(CPU, CX18_CPU_SET_FILTER_PARAM, 0),
|
API_ENTRY(CPU, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 0),
|
API_ENTRY(CPU, CX18_CPU_SET_MEDIAN_CORING, 0),
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API_ENTRY(CPU, CX18_CPU_SET_INDEXTABLE, 0),
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API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PARAMETERS, 0),
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API_ENTRY(CPU, CX18_CPU_SET_VIDEO_MUTE, 0),
|
API_ENTRY(CPU, CX18_CPU_SET_AUDIO_MUTE, 0),
|
API_ENTRY(CPU, CX18_CPU_SET_MISC_PARAMETERS, 0),
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API_ENTRY(CPU, CX18_CPU_SET_RAW_VBI_PARAM, API_SLOW),
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API_ENTRY(CPU, CX18_CPU_SET_CAPTURE_LINE_NO, 0),
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API_ENTRY(CPU, CX18_CPU_SET_COPYRIGHT, 0),
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API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PID, 0),
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API_ENTRY(CPU, CX18_CPU_SET_VIDEO_PID, 0),
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API_ENTRY(CPU, CX18_CPU_SET_VER_CROP_LINE, 0),
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API_ENTRY(CPU, CX18_CPU_SET_GOP_STRUCTURE, 0),
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API_ENTRY(CPU, CX18_CPU_SET_SCENE_CHANGE_DETECTION, 0),
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API_ENTRY(CPU, CX18_CPU_SET_ASPECT_RATIO, 0),
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API_ENTRY(CPU, CX18_CPU_SET_SKIP_INPUT_FRAME, 0),
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API_ENTRY(CPU, CX18_CPU_SET_SLICED_VBI_PARAM, 0),
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API_ENTRY(CPU, CX18_CPU_SET_USERDATA_PLACE_HOLDER, 0),
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API_ENTRY(CPU, CX18_CPU_GET_ENC_PTS, 0),
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API_ENTRY(CPU, CX18_CPU_SET_VFC_PARAM, 0),
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API_ENTRY(CPU, CX18_CPU_DE_SET_MDL_ACK, 0),
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API_ENTRY(CPU, CX18_CPU_DE_SET_MDL, API_FAST),
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API_ENTRY(CPU, CX18_CPU_DE_RELEASE_MDL, API_SLOW),
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API_ENTRY(APU, CX18_APU_START, 0),
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API_ENTRY(APU, CX18_APU_STOP, 0),
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API_ENTRY(APU, CX18_APU_RESETAI, 0),
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API_ENTRY(CPU, CX18_CPU_DEBUG_PEEK32, 0),
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API_ENTRY(0, 0, 0),
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};
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static const struct cx18_api_info *find_api_info(u32 cmd)
|
{
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int i;
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for (i = 0; api_info[i].cmd; i++)
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if (api_info[i].cmd == cmd)
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return &api_info[i];
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return NULL;
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}
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/* Call with buf of n*11+1 bytes */
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static char *u32arr2hex(u32 data[], int n, char *buf)
|
{
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char *p;
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int i;
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for (i = 0, p = buf; i < n; i++, p += 11) {
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/* kernel snprintf() appends '\0' always */
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snprintf(p, 12, " %#010x", data[i]);
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}
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*p = '\0';
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return buf;
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}
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static void dump_mb(struct cx18 *cx, struct cx18_mailbox *mb, char *name)
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{
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char argstr[MAX_MB_ARGUMENTS*11+1];
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if (!(cx18_debug & CX18_DBGFLG_API))
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return;
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CX18_DEBUG_API("%s: req %#010x ack %#010x cmd %#010x err %#010x args%s\n",
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name, mb->request, mb->ack, mb->cmd, mb->error,
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u32arr2hex(mb->args, MAX_MB_ARGUMENTS, argstr));
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}
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/*
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* Functions that run in a work_queue work handling context
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*/
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static void cx18_mdl_send_to_dvb(struct cx18_stream *s, struct cx18_mdl *mdl)
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{
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struct cx18_buffer *buf;
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if (s->dvb == NULL || !s->dvb->enabled || mdl->bytesused == 0)
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return;
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/* We ignore mdl and buf readpos accounting here - it doesn't matter */
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/* The likely case */
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if (list_is_singular(&mdl->buf_list)) {
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buf = list_first_entry(&mdl->buf_list, struct cx18_buffer,
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list);
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if (buf->bytesused)
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dvb_dmx_swfilter(&s->dvb->demux,
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buf->buf, buf->bytesused);
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return;
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}
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list_for_each_entry(buf, &mdl->buf_list, list) {
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if (buf->bytesused == 0)
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break;
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dvb_dmx_swfilter(&s->dvb->demux, buf->buf, buf->bytesused);
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}
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}
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static void cx18_mdl_send_to_videobuf(struct cx18_stream *s,
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struct cx18_mdl *mdl)
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{
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struct cx18_videobuf_buffer *vb_buf;
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struct cx18_buffer *buf;
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u8 *p;
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u32 offset = 0;
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int dispatch = 0;
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if (mdl->bytesused == 0)
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return;
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/* Acquire a videobuf buffer, clone to and and release it */
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spin_lock(&s->vb_lock);
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if (list_empty(&s->vb_capture))
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goto out;
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vb_buf = list_first_entry(&s->vb_capture, struct cx18_videobuf_buffer,
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vb.queue);
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p = videobuf_to_vmalloc(&vb_buf->vb);
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if (!p)
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goto out;
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offset = vb_buf->bytes_used;
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list_for_each_entry(buf, &mdl->buf_list, list) {
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if (buf->bytesused == 0)
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break;
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if ((offset + buf->bytesused) <= vb_buf->vb.bsize) {
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memcpy(p + offset, buf->buf, buf->bytesused);
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offset += buf->bytesused;
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vb_buf->bytes_used += buf->bytesused;
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}
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}
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/* If we've filled the buffer as per the callers res then dispatch it */
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if (vb_buf->bytes_used >= s->vb_bytes_per_frame) {
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dispatch = 1;
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vb_buf->bytes_used = 0;
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}
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if (dispatch) {
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vb_buf->vb.ts = ktime_get_ns();
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list_del(&vb_buf->vb.queue);
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vb_buf->vb.state = VIDEOBUF_DONE;
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wake_up(&vb_buf->vb.done);
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}
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mod_timer(&s->vb_timeout, msecs_to_jiffies(2000) + jiffies);
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out:
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spin_unlock(&s->vb_lock);
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}
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static void cx18_mdl_send_to_alsa(struct cx18 *cx, struct cx18_stream *s,
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struct cx18_mdl *mdl)
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{
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struct cx18_buffer *buf;
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if (mdl->bytesused == 0)
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return;
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/* We ignore mdl and buf readpos accounting here - it doesn't matter */
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/* The likely case */
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if (list_is_singular(&mdl->buf_list)) {
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buf = list_first_entry(&mdl->buf_list, struct cx18_buffer,
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list);
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if (buf->bytesused)
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cx->pcm_announce_callback(cx->alsa, buf->buf,
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buf->bytesused);
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return;
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}
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list_for_each_entry(buf, &mdl->buf_list, list) {
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if (buf->bytesused == 0)
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break;
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cx->pcm_announce_callback(cx->alsa, buf->buf, buf->bytesused);
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}
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}
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static void epu_dma_done(struct cx18 *cx, struct cx18_in_work_order *order)
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{
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u32 handle, mdl_ack_count, id;
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struct cx18_mailbox *mb;
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struct cx18_mdl_ack *mdl_ack;
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struct cx18_stream *s;
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struct cx18_mdl *mdl;
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int i;
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mb = &order->mb;
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handle = mb->args[0];
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s = cx18_handle_to_stream(cx, handle);
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if (s == NULL) {
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CX18_WARN("Got DMA done notification for unknown/inactive handle %d, %s mailbox seq no %d\n",
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handle,
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(order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) ?
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"stale" : "good", mb->request);
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return;
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}
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mdl_ack_count = mb->args[2];
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mdl_ack = order->mdl_ack;
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for (i = 0; i < mdl_ack_count; i++, mdl_ack++) {
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id = mdl_ack->id;
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/*
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* Simple integrity check for processing a stale (and possibly
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* inconsistent mailbox): make sure the MDL id is in the
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* valid range for the stream.
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*
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* We go through the trouble of dealing with stale mailboxes
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* because most of the time, the mailbox data is still valid and
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* unchanged (and in practice the firmware ping-pongs the
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* two mdl_ack buffers so mdl_acks are not stale).
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*
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* There are occasions when we get a half changed mailbox,
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* which this check catches for a handle & id mismatch. If the
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* handle and id do correspond, the worst case is that we
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* completely lost the old MDL, but pick up the new MDL
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* early (but the new mdl_ack is guaranteed to be good in this
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* case as the firmware wouldn't point us to a new mdl_ack until
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* it's filled in).
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*
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* cx18_queue_get_mdl() will detect the lost MDLs
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* and send them back to q_free for fw rotation eventually.
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*/
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if ((order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) &&
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!(id >= s->mdl_base_idx &&
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id < (s->mdl_base_idx + s->buffers))) {
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CX18_WARN("Fell behind! Ignoring stale mailbox with inconsistent data. Lost MDL for mailbox seq no %d\n",
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mb->request);
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break;
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}
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mdl = cx18_queue_get_mdl(s, id, mdl_ack->data_used);
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CX18_DEBUG_HI_DMA("DMA DONE for %s (MDL %d)\n", s->name, id);
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if (mdl == NULL) {
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CX18_WARN("Could not find MDL %d for stream %s\n",
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id, s->name);
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continue;
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}
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CX18_DEBUG_HI_DMA("%s recv bytesused = %d\n",
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s->name, mdl->bytesused);
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if (s->type == CX18_ENC_STREAM_TYPE_TS) {
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cx18_mdl_send_to_dvb(s, mdl);
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cx18_enqueue(s, mdl, &s->q_free);
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} else if (s->type == CX18_ENC_STREAM_TYPE_PCM) {
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/* Pass the data to cx18-alsa */
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if (cx->pcm_announce_callback != NULL) {
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cx18_mdl_send_to_alsa(cx, s, mdl);
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cx18_enqueue(s, mdl, &s->q_free);
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} else {
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cx18_enqueue(s, mdl, &s->q_full);
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}
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} else if (s->type == CX18_ENC_STREAM_TYPE_YUV) {
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cx18_mdl_send_to_videobuf(s, mdl);
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cx18_enqueue(s, mdl, &s->q_free);
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} else {
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cx18_enqueue(s, mdl, &s->q_full);
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if (s->type == CX18_ENC_STREAM_TYPE_IDX)
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cx18_stream_rotate_idx_mdls(cx);
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}
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}
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/* Put as many MDLs as possible back into fw use */
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cx18_stream_load_fw_queue(s);
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wake_up(&cx->dma_waitq);
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if (s->id != -1)
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wake_up(&s->waitq);
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}
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static void epu_debug(struct cx18 *cx, struct cx18_in_work_order *order)
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{
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char *p;
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char *str = order->str;
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CX18_DEBUG_INFO("%x %s\n", order->mb.args[0], str);
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p = strchr(str, '.');
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if (!test_bit(CX18_F_I_LOADED_FW, &cx->i_flags) && p && p > str)
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CX18_INFO("FW version: %s\n", p - 1);
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}
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static void epu_cmd(struct cx18 *cx, struct cx18_in_work_order *order)
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{
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switch (order->rpu) {
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case CPU:
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{
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switch (order->mb.cmd) {
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case CX18_EPU_DMA_DONE:
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epu_dma_done(cx, order);
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break;
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case CX18_EPU_DEBUG:
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epu_debug(cx, order);
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break;
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default:
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CX18_WARN("Unknown CPU to EPU mailbox command %#0x\n",
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order->mb.cmd);
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break;
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}
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break;
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}
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case APU:
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CX18_WARN("Unknown APU to EPU mailbox command %#0x\n",
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order->mb.cmd);
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break;
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default:
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break;
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}
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}
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static
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void free_in_work_order(struct cx18 *cx, struct cx18_in_work_order *order)
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{
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atomic_set(&order->pending, 0);
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}
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void cx18_in_work_handler(struct work_struct *work)
|
{
|
struct cx18_in_work_order *order =
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container_of(work, struct cx18_in_work_order, work);
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struct cx18 *cx = order->cx;
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epu_cmd(cx, order);
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free_in_work_order(cx, order);
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}
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|
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/*
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* Functions that run in an interrupt handling context
|
*/
|
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static void mb_ack_irq(struct cx18 *cx, struct cx18_in_work_order *order)
|
{
|
struct cx18_mailbox __iomem *ack_mb;
|
u32 ack_irq, req;
|
|
switch (order->rpu) {
|
case APU:
|
ack_irq = IRQ_EPU_TO_APU_ACK;
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ack_mb = &cx->scb->apu2epu_mb;
|
break;
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case CPU:
|
ack_irq = IRQ_EPU_TO_CPU_ACK;
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ack_mb = &cx->scb->cpu2epu_mb;
|
break;
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default:
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CX18_WARN("Unhandled RPU (%d) for command %x ack\n",
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order->rpu, order->mb.cmd);
|
return;
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}
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req = order->mb.request;
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/* Don't ack if the RPU has gotten impatient and timed us out */
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if (req != cx18_readl(cx, &ack_mb->request) ||
|
req == cx18_readl(cx, &ack_mb->ack)) {
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CX18_DEBUG_WARN("Possibly falling behind: %s self-ack'ed our incoming %s to EPU mailbox (sequence no. %u) while processing\n",
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rpu_str[order->rpu], rpu_str[order->rpu], req);
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order->flags |= CX18_F_EWO_MB_STALE_WHILE_PROC;
|
return;
|
}
|
cx18_writel(cx, req, &ack_mb->ack);
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cx18_write_reg_expect(cx, ack_irq, SW2_INT_SET, ack_irq, ack_irq);
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return;
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}
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static int epu_dma_done_irq(struct cx18 *cx, struct cx18_in_work_order *order)
|
{
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u32 handle, mdl_ack_offset, mdl_ack_count;
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struct cx18_mailbox *mb;
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int i;
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mb = &order->mb;
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handle = mb->args[0];
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mdl_ack_offset = mb->args[1];
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mdl_ack_count = mb->args[2];
|
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if (handle == CX18_INVALID_TASK_HANDLE ||
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mdl_ack_count == 0 || mdl_ack_count > CX18_MAX_MDL_ACKS) {
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if ((order->flags & CX18_F_EWO_MB_STALE) == 0)
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mb_ack_irq(cx, order);
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return -1;
|
}
|
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for (i = 0; i < sizeof(struct cx18_mdl_ack) * mdl_ack_count; i += sizeof(u32))
|
((u32 *)order->mdl_ack)[i / sizeof(u32)] =
|
cx18_readl(cx, cx->enc_mem + mdl_ack_offset + i);
|
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if ((order->flags & CX18_F_EWO_MB_STALE) == 0)
|
mb_ack_irq(cx, order);
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return 1;
|
}
|
|
static
|
int epu_debug_irq(struct cx18 *cx, struct cx18_in_work_order *order)
|
{
|
u32 str_offset;
|
char *str = order->str;
|
|
str[0] = '\0';
|
str_offset = order->mb.args[1];
|
if (str_offset) {
|
cx18_setup_page(cx, str_offset);
|
cx18_memcpy_fromio(cx, str, cx->enc_mem + str_offset, 252);
|
str[252] = '\0';
|
cx18_setup_page(cx, SCB_OFFSET);
|
}
|
|
if ((order->flags & CX18_F_EWO_MB_STALE) == 0)
|
mb_ack_irq(cx, order);
|
|
return str_offset ? 1 : 0;
|
}
|
|
static inline
|
int epu_cmd_irq(struct cx18 *cx, struct cx18_in_work_order *order)
|
{
|
int ret = -1;
|
|
switch (order->rpu) {
|
case CPU:
|
{
|
switch (order->mb.cmd) {
|
case CX18_EPU_DMA_DONE:
|
ret = epu_dma_done_irq(cx, order);
|
break;
|
case CX18_EPU_DEBUG:
|
ret = epu_debug_irq(cx, order);
|
break;
|
default:
|
CX18_WARN("Unknown CPU to EPU mailbox command %#0x\n",
|
order->mb.cmd);
|
break;
|
}
|
break;
|
}
|
case APU:
|
CX18_WARN("Unknown APU to EPU mailbox command %#0x\n",
|
order->mb.cmd);
|
break;
|
default:
|
break;
|
}
|
return ret;
|
}
|
|
static inline
|
struct cx18_in_work_order *alloc_in_work_order_irq(struct cx18 *cx)
|
{
|
int i;
|
struct cx18_in_work_order *order = NULL;
|
|
for (i = 0; i < CX18_MAX_IN_WORK_ORDERS; i++) {
|
/*
|
* We only need "pending" atomic to inspect its contents,
|
* and need not do a check and set because:
|
* 1. Any work handler thread only clears "pending" and only
|
* on one, particular work order at a time, per handler thread.
|
* 2. "pending" is only set here, and we're serialized because
|
* we're called in an IRQ handler context.
|
*/
|
if (atomic_read(&cx->in_work_order[i].pending) == 0) {
|
order = &cx->in_work_order[i];
|
atomic_set(&order->pending, 1);
|
break;
|
}
|
}
|
return order;
|
}
|
|
void cx18_api_epu_cmd_irq(struct cx18 *cx, int rpu)
|
{
|
struct cx18_mailbox __iomem *mb;
|
struct cx18_mailbox *order_mb;
|
struct cx18_in_work_order *order;
|
int submit;
|
int i;
|
|
switch (rpu) {
|
case CPU:
|
mb = &cx->scb->cpu2epu_mb;
|
break;
|
case APU:
|
mb = &cx->scb->apu2epu_mb;
|
break;
|
default:
|
return;
|
}
|
|
order = alloc_in_work_order_irq(cx);
|
if (order == NULL) {
|
CX18_WARN("Unable to find blank work order form to schedule incoming mailbox command processing\n");
|
return;
|
}
|
|
order->flags = 0;
|
order->rpu = rpu;
|
order_mb = &order->mb;
|
|
/* mb->cmd and mb->args[0] through mb->args[2] */
|
for (i = 0; i < 4; i++)
|
(&order_mb->cmd)[i] = cx18_readl(cx, &mb->cmd + i);
|
|
/* mb->request and mb->ack. N.B. we want to read mb->ack last */
|
for (i = 0; i < 2; i++)
|
(&order_mb->request)[i] = cx18_readl(cx, &mb->request + i);
|
|
if (order_mb->request == order_mb->ack) {
|
CX18_DEBUG_WARN("Possibly falling behind: %s self-ack'ed our incoming %s to EPU mailbox (sequence no. %u)\n",
|
rpu_str[rpu], rpu_str[rpu], order_mb->request);
|
if (cx18_debug & CX18_DBGFLG_WARN)
|
dump_mb(cx, order_mb, "incoming");
|
order->flags = CX18_F_EWO_MB_STALE_UPON_RECEIPT;
|
}
|
|
/*
|
* Individual EPU command processing is responsible for ack-ing
|
* a non-stale mailbox as soon as possible
|
*/
|
submit = epu_cmd_irq(cx, order);
|
if (submit > 0) {
|
queue_work(cx->in_work_queue, &order->work);
|
}
|
}
|
|
|
/*
|
* Functions called from a non-interrupt, non work_queue context
|
*/
|
|
static int cx18_api_call(struct cx18 *cx, u32 cmd, int args, u32 data[])
|
{
|
const struct cx18_api_info *info = find_api_info(cmd);
|
u32 irq, req, ack, err;
|
struct cx18_mailbox __iomem *mb;
|
wait_queue_head_t *waitq;
|
struct mutex *mb_lock;
|
unsigned long int t0, timeout, ret;
|
int i;
|
char argstr[MAX_MB_ARGUMENTS*11+1];
|
DEFINE_WAIT(w);
|
|
if (info == NULL) {
|
CX18_WARN("unknown cmd %x\n", cmd);
|
return -EINVAL;
|
}
|
|
if (cx18_debug & CX18_DBGFLG_API) { /* only call u32arr2hex if needed */
|
if (cmd == CX18_CPU_DE_SET_MDL) {
|
if (cx18_debug & CX18_DBGFLG_HIGHVOL)
|
CX18_DEBUG_HI_API("%s\tcmd %#010x args%s\n",
|
info->name, cmd,
|
u32arr2hex(data, args, argstr));
|
} else
|
CX18_DEBUG_API("%s\tcmd %#010x args%s\n",
|
info->name, cmd,
|
u32arr2hex(data, args, argstr));
|
}
|
|
switch (info->rpu) {
|
case APU:
|
waitq = &cx->mb_apu_waitq;
|
mb_lock = &cx->epu2apu_mb_lock;
|
irq = IRQ_EPU_TO_APU;
|
mb = &cx->scb->epu2apu_mb;
|
break;
|
case CPU:
|
waitq = &cx->mb_cpu_waitq;
|
mb_lock = &cx->epu2cpu_mb_lock;
|
irq = IRQ_EPU_TO_CPU;
|
mb = &cx->scb->epu2cpu_mb;
|
break;
|
default:
|
CX18_WARN("Unknown RPU (%d) for API call\n", info->rpu);
|
return -EINVAL;
|
}
|
|
mutex_lock(mb_lock);
|
/*
|
* Wait for an in-use mailbox to complete
|
*
|
* If the XPU is responding with Ack's, the mailbox shouldn't be in
|
* a busy state, since we serialize access to it on our end.
|
*
|
* If the wait for ack after sending a previous command was interrupted
|
* by a signal, we may get here and find a busy mailbox. After waiting,
|
* mark it "not busy" from our end, if the XPU hasn't ack'ed it still.
|
*/
|
req = cx18_readl(cx, &mb->request);
|
timeout = msecs_to_jiffies(10);
|
ret = wait_event_timeout(*waitq,
|
(ack = cx18_readl(cx, &mb->ack)) == req,
|
timeout);
|
if (req != ack) {
|
/* waited long enough, make the mbox "not busy" from our end */
|
cx18_writel(cx, req, &mb->ack);
|
CX18_ERR("mbox was found stuck busy when setting up for %s; clearing busy and trying to proceed\n",
|
info->name);
|
} else if (ret != timeout)
|
CX18_DEBUG_API("waited %u msecs for busy mbox to be acked\n",
|
jiffies_to_msecs(timeout-ret));
|
|
/* Build the outgoing mailbox */
|
req = ((req & 0xfffffffe) == 0xfffffffe) ? 1 : req + 1;
|
|
cx18_writel(cx, cmd, &mb->cmd);
|
for (i = 0; i < args; i++)
|
cx18_writel(cx, data[i], &mb->args[i]);
|
cx18_writel(cx, 0, &mb->error);
|
cx18_writel(cx, req, &mb->request);
|
cx18_writel(cx, req - 1, &mb->ack); /* ensure ack & req are distinct */
|
|
/*
|
* Notify the XPU and wait for it to send an Ack back
|
*/
|
timeout = msecs_to_jiffies((info->flags & API_FAST) ? 10 : 20);
|
|
CX18_DEBUG_HI_IRQ("sending interrupt SW1: %x to send %s\n",
|
irq, info->name);
|
|
/* So we don't miss the wakeup, prepare to wait before notifying fw */
|
prepare_to_wait(waitq, &w, TASK_UNINTERRUPTIBLE);
|
cx18_write_reg_expect(cx, irq, SW1_INT_SET, irq, irq);
|
|
t0 = jiffies;
|
ack = cx18_readl(cx, &mb->ack);
|
if (ack != req) {
|
schedule_timeout(timeout);
|
ret = jiffies - t0;
|
ack = cx18_readl(cx, &mb->ack);
|
} else {
|
ret = jiffies - t0;
|
}
|
|
finish_wait(waitq, &w);
|
|
if (req != ack) {
|
mutex_unlock(mb_lock);
|
if (ret >= timeout) {
|
/* Timed out */
|
CX18_DEBUG_WARN("sending %s timed out waiting %d msecs for RPU acknowledgment\n",
|
info->name, jiffies_to_msecs(ret));
|
} else {
|
CX18_DEBUG_WARN("woken up before mailbox ack was ready after submitting %s to RPU. only waited %d msecs on req %u but awakened with unmatched ack %u\n",
|
info->name,
|
jiffies_to_msecs(ret),
|
req, ack);
|
}
|
return -EINVAL;
|
}
|
|
if (ret >= timeout)
|
CX18_DEBUG_WARN("failed to be awakened upon RPU acknowledgment sending %s; timed out waiting %d msecs\n",
|
info->name, jiffies_to_msecs(ret));
|
else
|
CX18_DEBUG_HI_API("waited %u msecs for %s to be acked\n",
|
jiffies_to_msecs(ret), info->name);
|
|
/* Collect data returned by the XPU */
|
for (i = 0; i < MAX_MB_ARGUMENTS; i++)
|
data[i] = cx18_readl(cx, &mb->args[i]);
|
err = cx18_readl(cx, &mb->error);
|
mutex_unlock(mb_lock);
|
|
/*
|
* Wait for XPU to perform extra actions for the caller in some cases.
|
* e.g. CX18_CPU_DE_RELEASE_MDL will cause the CPU to send all MDLs
|
* back in a burst shortly thereafter
|
*/
|
if (info->flags & API_SLOW)
|
cx18_msleep_timeout(300, 0);
|
|
if (err)
|
CX18_DEBUG_API("mailbox error %08x for command %s\n", err,
|
info->name);
|
return err ? -EIO : 0;
|
}
|
|
int cx18_api(struct cx18 *cx, u32 cmd, int args, u32 data[])
|
{
|
return cx18_api_call(cx, cmd, args, data);
|
}
|
|
static int cx18_set_filter_param(struct cx18_stream *s)
|
{
|
struct cx18 *cx = s->cx;
|
u32 mode;
|
int ret;
|
|
mode = (cx->filter_mode & 1) ? 2 : (cx->spatial_strength ? 1 : 0);
|
ret = cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
|
s->handle, 1, mode, cx->spatial_strength);
|
mode = (cx->filter_mode & 2) ? 2 : (cx->temporal_strength ? 1 : 0);
|
ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
|
s->handle, 0, mode, cx->temporal_strength);
|
ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
|
s->handle, 2, cx->filter_mode >> 2, 0);
|
return ret;
|
}
|
|
int cx18_api_func(void *priv, u32 cmd, int in, int out,
|
u32 data[CX2341X_MBOX_MAX_DATA])
|
{
|
struct cx18_stream *s = priv;
|
struct cx18 *cx = s->cx;
|
|
switch (cmd) {
|
case CX2341X_ENC_SET_OUTPUT_PORT:
|
return 0;
|
case CX2341X_ENC_SET_FRAME_RATE:
|
return cx18_vapi(cx, CX18_CPU_SET_VIDEO_IN, 6,
|
s->handle, 0, 0, 0, 0, data[0]);
|
case CX2341X_ENC_SET_FRAME_SIZE:
|
return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RESOLUTION, 3,
|
s->handle, data[1], data[0]);
|
case CX2341X_ENC_SET_STREAM_TYPE:
|
return cx18_vapi(cx, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 2,
|
s->handle, data[0]);
|
case CX2341X_ENC_SET_ASPECT_RATIO:
|
return cx18_vapi(cx, CX18_CPU_SET_ASPECT_RATIO, 2,
|
s->handle, data[0]);
|
|
case CX2341X_ENC_SET_GOP_PROPERTIES:
|
return cx18_vapi(cx, CX18_CPU_SET_GOP_STRUCTURE, 3,
|
s->handle, data[0], data[1]);
|
case CX2341X_ENC_SET_GOP_CLOSURE:
|
return 0;
|
case CX2341X_ENC_SET_AUDIO_PROPERTIES:
|
return cx18_vapi(cx, CX18_CPU_SET_AUDIO_PARAMETERS, 2,
|
s->handle, data[0]);
|
case CX2341X_ENC_MUTE_AUDIO:
|
return cx18_vapi(cx, CX18_CPU_SET_AUDIO_MUTE, 2,
|
s->handle, data[0]);
|
case CX2341X_ENC_SET_BIT_RATE:
|
return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RATE, 5,
|
s->handle, data[0], data[1], data[2], data[3]);
|
case CX2341X_ENC_MUTE_VIDEO:
|
return cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2,
|
s->handle, data[0]);
|
case CX2341X_ENC_SET_FRAME_DROP_RATE:
|
return cx18_vapi(cx, CX18_CPU_SET_SKIP_INPUT_FRAME, 2,
|
s->handle, data[0]);
|
case CX2341X_ENC_MISC:
|
return cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 4,
|
s->handle, data[0], data[1], data[2]);
|
case CX2341X_ENC_SET_DNR_FILTER_MODE:
|
cx->filter_mode = (data[0] & 3) | (data[1] << 2);
|
return cx18_set_filter_param(s);
|
case CX2341X_ENC_SET_DNR_FILTER_PROPS:
|
cx->spatial_strength = data[0];
|
cx->temporal_strength = data[1];
|
return cx18_set_filter_param(s);
|
case CX2341X_ENC_SET_SPATIAL_FILTER_TYPE:
|
return cx18_vapi(cx, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 3,
|
s->handle, data[0], data[1]);
|
case CX2341X_ENC_SET_CORING_LEVELS:
|
return cx18_vapi(cx, CX18_CPU_SET_MEDIAN_CORING, 5,
|
s->handle, data[0], data[1], data[2], data[3]);
|
}
|
CX18_WARN("Unknown cmd %x\n", cmd);
|
return 0;
|
}
|
|
int cx18_vapi_result(struct cx18 *cx, u32 data[MAX_MB_ARGUMENTS],
|
u32 cmd, int args, ...)
|
{
|
va_list ap;
|
int i;
|
|
va_start(ap, args);
|
for (i = 0; i < args; i++)
|
data[i] = va_arg(ap, u32);
|
va_end(ap);
|
return cx18_api(cx, cmd, args, data);
|
}
|
|
int cx18_vapi(struct cx18 *cx, u32 cmd, int args, ...)
|
{
|
u32 data[MAX_MB_ARGUMENTS];
|
va_list ap;
|
int i;
|
|
if (cx == NULL) {
|
CX18_ERR("cx == NULL (cmd=%x)\n", cmd);
|
return 0;
|
}
|
if (args > MAX_MB_ARGUMENTS) {
|
CX18_ERR("args too big (cmd=%x)\n", cmd);
|
args = MAX_MB_ARGUMENTS;
|
}
|
va_start(ap, args);
|
for (i = 0; i < args; i++)
|
data[i] = va_arg(ap, u32);
|
va_end(ap);
|
return cx18_api(cx, cmd, args, data);
|
}
|
