// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* cx18 I2C functions
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*
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* Derived from ivtv-i2c.c
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*
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* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
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* Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
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*/
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#include "cx18-driver.h"
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#include "cx18-io.h"
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#include "cx18-cards.h"
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#include "cx18-gpio.h"
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#include "cx18-i2c.h"
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#include "cx18-irq.h"
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#define CX18_REG_I2C_1_WR 0xf15000
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#define CX18_REG_I2C_1_RD 0xf15008
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#define CX18_REG_I2C_2_WR 0xf25100
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#define CX18_REG_I2C_2_RD 0xf25108
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#define SETSCL_BIT 0x0001
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#define SETSDL_BIT 0x0002
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#define GETSCL_BIT 0x0004
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#define GETSDL_BIT 0x0008
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#define CX18_CS5345_I2C_ADDR 0x4c
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#define CX18_Z8F0811_IR_TX_I2C_ADDR 0x70
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#define CX18_Z8F0811_IR_RX_I2C_ADDR 0x71
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/* This array should match the CX18_HW_ defines */
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static const u8 hw_addrs[] = {
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0, /* CX18_HW_TUNER */
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0, /* CX18_HW_TVEEPROM */
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CX18_CS5345_I2C_ADDR, /* CX18_HW_CS5345 */
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0, /* CX18_HW_DVB */
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0, /* CX18_HW_418_AV */
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0, /* CX18_HW_GPIO_MUX */
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0, /* CX18_HW_GPIO_RESET_CTRL */
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CX18_Z8F0811_IR_RX_I2C_ADDR, /* CX18_HW_Z8F0811_IR_HAUP */
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};
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/* This array should match the CX18_HW_ defines */
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/* This might well become a card-specific array */
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static const u8 hw_bus[] = {
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1, /* CX18_HW_TUNER */
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0, /* CX18_HW_TVEEPROM */
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0, /* CX18_HW_CS5345 */
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0, /* CX18_HW_DVB */
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0, /* CX18_HW_418_AV */
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0, /* CX18_HW_GPIO_MUX */
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0, /* CX18_HW_GPIO_RESET_CTRL */
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0, /* CX18_HW_Z8F0811_IR_HAUP */
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};
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/* This array should match the CX18_HW_ defines */
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static const char * const hw_devicenames[] = {
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"tuner",
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"tveeprom",
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"cs5345",
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"cx23418_DTV",
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"cx23418_AV",
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"gpio_mux",
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"gpio_reset_ctrl",
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"ir_z8f0811_haup",
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};
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static int cx18_i2c_new_ir(struct cx18 *cx, struct i2c_adapter *adap, u32 hw,
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const char *type, u8 addr)
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{
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struct i2c_board_info info;
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struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
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unsigned short addr_list[2] = { addr, I2C_CLIENT_END };
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memset(&info, 0, sizeof(struct i2c_board_info));
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strscpy(info.type, type, I2C_NAME_SIZE);
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/* Our default information for ir-kbd-i2c.c to use */
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switch (hw) {
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case CX18_HW_Z8F0811_IR_HAUP:
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init_data->ir_codes = RC_MAP_HAUPPAUGE;
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init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
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init_data->type = RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC6_MCE |
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RC_PROTO_BIT_RC6_6A_32;
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init_data->name = cx->card_name;
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info.platform_data = init_data;
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break;
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}
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return IS_ERR(i2c_new_scanned_device(adap, &info, addr_list, NULL)) ?
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-1 : 0;
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}
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int cx18_i2c_register(struct cx18 *cx, unsigned idx)
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{
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struct v4l2_subdev *sd;
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int bus = hw_bus[idx];
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struct i2c_adapter *adap = &cx->i2c_adap[bus];
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const char *type = hw_devicenames[idx];
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u32 hw = 1 << idx;
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if (hw == CX18_HW_TUNER) {
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/* special tuner group handling */
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sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
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adap, type, 0, cx->card_i2c->radio);
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if (sd != NULL)
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sd->grp_id = hw;
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sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
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adap, type, 0, cx->card_i2c->demod);
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if (sd != NULL)
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sd->grp_id = hw;
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sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
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adap, type, 0, cx->card_i2c->tv);
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if (sd != NULL)
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sd->grp_id = hw;
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return sd != NULL ? 0 : -1;
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}
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if (hw == CX18_HW_Z8F0811_IR_HAUP)
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return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);
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/* Is it not an I2C device or one we do not wish to register? */
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if (!hw_addrs[idx])
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return -1;
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/* It's an I2C device other than an analog tuner or IR chip */
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sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, type, hw_addrs[idx],
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NULL);
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if (sd != NULL)
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sd->grp_id = hw;
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return sd != NULL ? 0 : -1;
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}
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/* Find the first member of the subdev group id in hw */
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struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
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{
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struct v4l2_subdev *result = NULL;
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struct v4l2_subdev *sd;
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spin_lock(&cx->v4l2_dev.lock);
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v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
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if (sd->grp_id == hw) {
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result = sd;
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break;
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}
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}
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spin_unlock(&cx->v4l2_dev.lock);
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return result;
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}
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static void cx18_setscl(void *data, int state)
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{
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struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
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int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
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u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
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u32 r = cx18_read_reg(cx, addr);
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if (state)
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cx18_write_reg(cx, r | SETSCL_BIT, addr);
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else
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cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
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}
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static void cx18_setsda(void *data, int state)
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{
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struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
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int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
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u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
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u32 r = cx18_read_reg(cx, addr);
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if (state)
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cx18_write_reg(cx, r | SETSDL_BIT, addr);
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else
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cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
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}
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static int cx18_getscl(void *data)
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{
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struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
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int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
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u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
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return cx18_read_reg(cx, addr) & GETSCL_BIT;
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}
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static int cx18_getsda(void *data)
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{
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struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
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int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
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u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
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return cx18_read_reg(cx, addr) & GETSDL_BIT;
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}
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/* template for i2c-bit-algo */
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static const struct i2c_adapter cx18_i2c_adap_template = {
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.name = "cx18 i2c driver",
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.algo = NULL, /* set by i2c-algo-bit */
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.algo_data = NULL, /* filled from template */
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.owner = THIS_MODULE,
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};
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#define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
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#define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
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static const struct i2c_algo_bit_data cx18_i2c_algo_template = {
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.setsda = cx18_setsda,
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.setscl = cx18_setscl,
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.getsda = cx18_getsda,
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.getscl = cx18_getscl,
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.udelay = CX18_SCL_PERIOD/2, /* 1/2 clock period in usec*/
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.timeout = CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
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};
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/* init + register i2c adapter */
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int init_cx18_i2c(struct cx18 *cx)
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{
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int i, err;
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CX18_DEBUG_I2C("i2c init\n");
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for (i = 0; i < 2; i++) {
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/* Setup algorithm for adapter */
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cx->i2c_algo[i] = cx18_i2c_algo_template;
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cx->i2c_algo_cb_data[i].cx = cx;
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cx->i2c_algo_cb_data[i].bus_index = i;
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cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
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/* Setup adapter */
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cx->i2c_adap[i] = cx18_i2c_adap_template;
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cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
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sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
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" #%d-%d", cx->instance, i);
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i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
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cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
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}
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if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
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/* Reset/Unreset I2C hardware block */
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/* Clock select 220MHz */
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cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
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0x00000000, 0x10001000);
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/* Clock Enable */
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cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
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0x00001000, 0x10001000);
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}
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/* courtesy of Steven Toth <stoth@hauppauge.com> */
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cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
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mdelay(10);
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cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
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mdelay(10);
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cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
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mdelay(10);
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/* Set to edge-triggered intrs. */
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cx18_write_reg(cx, 0x00c00000, 0xc730c8);
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/* Clear any stale intrs */
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cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
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~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
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/* Hw I2C1 Clock Freq ~100kHz */
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cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
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cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
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cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
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/* Hw I2C2 Clock Freq ~100kHz */
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cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
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cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
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cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
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cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
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core, reset, (u32) CX18_GPIO_RESET_I2C);
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err = i2c_bit_add_bus(&cx->i2c_adap[0]);
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if (err)
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goto err;
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err = i2c_bit_add_bus(&cx->i2c_adap[1]);
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if (err)
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goto err_del_bus_0;
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return 0;
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err_del_bus_0:
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i2c_del_adapter(&cx->i2c_adap[0]);
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err:
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return err;
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}
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void exit_cx18_i2c(struct cx18 *cx)
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{
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int i;
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CX18_DEBUG_I2C("i2c exit\n");
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cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
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CX18_REG_I2C_1_WR);
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cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
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CX18_REG_I2C_2_WR);
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for (i = 0; i < 2; i++) {
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i2c_del_adapter(&cx->i2c_adap[i]);
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}
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}
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/*
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Hauppauge HVR1600 should have:
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32 cx24227
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98 unknown
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a0 eeprom
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c2 tuner
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e? zilog ir
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*/
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