// SPDX-License-Identifier: GPL-2.0-only
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/* drivers/media/platform/s5p-cec/exynos_hdmi_cecctrl.c
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*
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* Copyright (c) 2009, 2014 Samsung Electronics
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* http://www.samsung.com/
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*
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* cec ftn file for Samsung TVOUT driver
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*/
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#include <linux/io.h>
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#include <linux/device.h>
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#include "exynos_hdmi_cec.h"
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#include "regs-cec.h"
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#define S5P_HDMI_FIN 24000000
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#define CEC_DIV_RATIO 320000
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#define CEC_MESSAGE_BROADCAST_MASK 0x0F
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#define CEC_MESSAGE_BROADCAST 0x0F
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#define CEC_FILTER_THRESHOLD 0x15
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void s5p_cec_set_divider(struct s5p_cec_dev *cec)
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{
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u32 div_ratio, div_val;
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unsigned int reg;
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div_ratio = S5P_HDMI_FIN / CEC_DIV_RATIO - 1;
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if (regmap_read(cec->pmu, EXYNOS_HDMI_PHY_CONTROL, ®)) {
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dev_err(cec->dev, "failed to read phy control\n");
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return;
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}
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reg = (reg & ~(0x3FF << 16)) | (div_ratio << 16);
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if (regmap_write(cec->pmu, EXYNOS_HDMI_PHY_CONTROL, reg)) {
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dev_err(cec->dev, "failed to write phy control\n");
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return;
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}
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div_val = CEC_DIV_RATIO * 0.00005 - 1;
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writeb(0x0, cec->reg + S5P_CEC_DIVISOR_3);
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writeb(0x0, cec->reg + S5P_CEC_DIVISOR_2);
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writeb(0x0, cec->reg + S5P_CEC_DIVISOR_1);
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writeb(div_val, cec->reg + S5P_CEC_DIVISOR_0);
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}
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void s5p_cec_enable_rx(struct s5p_cec_dev *cec)
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{
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u8 reg;
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reg = readb(cec->reg + S5P_CEC_RX_CTRL);
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reg |= S5P_CEC_RX_CTRL_ENABLE;
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writeb(reg, cec->reg + S5P_CEC_RX_CTRL);
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}
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void s5p_cec_mask_rx_interrupts(struct s5p_cec_dev *cec)
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{
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u8 reg;
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reg = readb(cec->reg + S5P_CEC_IRQ_MASK);
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reg |= S5P_CEC_IRQ_RX_DONE;
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reg |= S5P_CEC_IRQ_RX_ERROR;
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writeb(reg, cec->reg + S5P_CEC_IRQ_MASK);
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}
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void s5p_cec_unmask_rx_interrupts(struct s5p_cec_dev *cec)
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{
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u8 reg;
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reg = readb(cec->reg + S5P_CEC_IRQ_MASK);
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reg &= ~S5P_CEC_IRQ_RX_DONE;
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reg &= ~S5P_CEC_IRQ_RX_ERROR;
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writeb(reg, cec->reg + S5P_CEC_IRQ_MASK);
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}
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void s5p_cec_mask_tx_interrupts(struct s5p_cec_dev *cec)
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{
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u8 reg;
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reg = readb(cec->reg + S5P_CEC_IRQ_MASK);
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reg |= S5P_CEC_IRQ_TX_DONE;
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reg |= S5P_CEC_IRQ_TX_ERROR;
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writeb(reg, cec->reg + S5P_CEC_IRQ_MASK);
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}
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void s5p_cec_unmask_tx_interrupts(struct s5p_cec_dev *cec)
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{
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u8 reg;
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reg = readb(cec->reg + S5P_CEC_IRQ_MASK);
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reg &= ~S5P_CEC_IRQ_TX_DONE;
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reg &= ~S5P_CEC_IRQ_TX_ERROR;
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writeb(reg, cec->reg + S5P_CEC_IRQ_MASK);
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}
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void s5p_cec_reset(struct s5p_cec_dev *cec)
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{
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u8 reg;
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writeb(S5P_CEC_RX_CTRL_RESET, cec->reg + S5P_CEC_RX_CTRL);
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writeb(S5P_CEC_TX_CTRL_RESET, cec->reg + S5P_CEC_TX_CTRL);
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reg = readb(cec->reg + 0xc4);
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reg &= ~0x1;
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writeb(reg, cec->reg + 0xc4);
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}
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void s5p_cec_tx_reset(struct s5p_cec_dev *cec)
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{
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writeb(S5P_CEC_TX_CTRL_RESET, cec->reg + S5P_CEC_TX_CTRL);
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}
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void s5p_cec_rx_reset(struct s5p_cec_dev *cec)
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{
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u8 reg;
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writeb(S5P_CEC_RX_CTRL_RESET, cec->reg + S5P_CEC_RX_CTRL);
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reg = readb(cec->reg + 0xc4);
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reg &= ~0x1;
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writeb(reg, cec->reg + 0xc4);
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}
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void s5p_cec_threshold(struct s5p_cec_dev *cec)
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{
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writeb(CEC_FILTER_THRESHOLD, cec->reg + S5P_CEC_RX_FILTER_TH);
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writeb(0, cec->reg + S5P_CEC_RX_FILTER_CTRL);
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}
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void s5p_cec_copy_packet(struct s5p_cec_dev *cec, char *data,
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size_t count, u8 retries)
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{
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int i = 0;
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u8 reg;
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while (i < count) {
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writeb(data[i], cec->reg + (S5P_CEC_TX_BUFF0 + (i * 4)));
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i++;
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}
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writeb(count, cec->reg + S5P_CEC_TX_BYTES);
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reg = readb(cec->reg + S5P_CEC_TX_CTRL);
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reg |= S5P_CEC_TX_CTRL_START;
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reg &= ~0x70;
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reg |= retries << 4;
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if ((data[0] & CEC_MESSAGE_BROADCAST_MASK) == CEC_MESSAGE_BROADCAST) {
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dev_dbg(cec->dev, "Broadcast");
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reg |= S5P_CEC_TX_CTRL_BCAST;
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} else {
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dev_dbg(cec->dev, "No Broadcast");
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reg &= ~S5P_CEC_TX_CTRL_BCAST;
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}
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writeb(reg, cec->reg + S5P_CEC_TX_CTRL);
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dev_dbg(cec->dev, "cec-tx: cec count (%zu): %*ph", count,
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(int)count, data);
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}
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void s5p_cec_set_addr(struct s5p_cec_dev *cec, u32 addr)
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{
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writeb(addr & 0x0F, cec->reg + S5P_CEC_LOGIC_ADDR);
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}
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u32 s5p_cec_get_status(struct s5p_cec_dev *cec)
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{
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u32 status = 0;
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status = readb(cec->reg + S5P_CEC_STATUS_0) & 0xf;
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status |= (readb(cec->reg + S5P_CEC_TX_STAT1) & 0xf) << 4;
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status |= readb(cec->reg + S5P_CEC_STATUS_1) << 8;
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status |= readb(cec->reg + S5P_CEC_STATUS_2) << 16;
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status |= readb(cec->reg + S5P_CEC_STATUS_3) << 24;
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dev_dbg(cec->dev, "status = 0x%x!\n", status);
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return status;
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}
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void s5p_clr_pending_tx(struct s5p_cec_dev *cec)
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{
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writeb(S5P_CEC_IRQ_TX_DONE | S5P_CEC_IRQ_TX_ERROR,
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cec->reg + S5P_CEC_IRQ_CLEAR);
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}
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void s5p_clr_pending_rx(struct s5p_cec_dev *cec)
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{
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writeb(S5P_CEC_IRQ_RX_DONE | S5P_CEC_IRQ_RX_ERROR,
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cec->reg + S5P_CEC_IRQ_CLEAR);
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}
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void s5p_cec_get_rx_buf(struct s5p_cec_dev *cec, u32 size, u8 *buffer)
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{
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u32 i = 0;
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char debug[40];
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while (i < size) {
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buffer[i] = readb(cec->reg + S5P_CEC_RX_BUFF0 + (i * 4));
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sprintf(debug + i * 2, "%02x ", buffer[i]);
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i++;
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}
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dev_dbg(cec->dev, "cec-rx: cec size(%d): %s", size, debug);
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}
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