/*
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* Copyright (C) 2012 UPI semi <Finley_huang@upi-semi.com>. All Rights Reserved.
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* 5152 Light Sensor Driver for Linux 2.6
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#ifndef __us5152_H__
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#define __us5152_H__
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#include <linux/types.h>
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#define PWR_MODE_DOWN_MASK 0x80
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#define PWR_MODE_OPERATE_MASK 0x7F
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/*us5152 Slave Addr*/
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#define LIGHT_ADDR 0x72
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/*Interrupt PIN for S3C6410*/
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#define IRQ_LIGHT_INT IRQ_EINT(6)
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/*Register Set*/
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#define REGS_CR0 0x00
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#define REGS_CR1 0x01
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#define REGS_CR2 0x02
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#define REGS_CR3 0x03
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//ALS
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#define REGS_INT_LSB_TH_LO 0x04
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#define REGS_INT_MSB_TH_LO 0x05
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#define REGS_INT_LSB_TH_HI 0x06
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#define REGS_INT_MSB_TH_HI 0x07
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//ALS data
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#define REGS_LBS_SENSOR 0x0C
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#define REGS_MBS_SENSOR 0x0D
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#define REGS_CR10 0x10
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#define REGS_CR11 0x11
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#define REGS_VERSION_ID 0x1F
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#define REGS_CHIP_ID 0xB2
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/*ShutDown_EN*/
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#define CR0_OPERATION 0x0
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#define CR0_SHUTDOWN_EN 0x1
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#define CR0_SHUTDOWN_SHIFT (7)
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#define CR0_SHUTDOWN_MASK (0x1 << CR0_SHUTDOWN_SHIFT)
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/*OneShot_EN*/
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#define CR0_ONESHOT_EN 0x01
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#define CR0_ONESHOT_SHIFT (6)
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#define CR0_ONESHOT_MASK (0x1 << CR0_ONESHOT_SHIFT)
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/*Operation Mode*/
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#define CR0_OPMODE_ALSANDPS 0x0
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#define CR0_OPMODE_ALSONLY 0x1
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#define CR0_OPMODE_IRONLY 0x2
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#define CR0_OPMODE_SHIFT (4)
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#define CR0_OPMODE_MASK (0x3 << CR0_OPMODE_SHIFT)
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/*all int flag (PROX, INT_A, INT_P)*/
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#define CR0_ALL_INT_CLEAR 0x0
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#define CR0_ALL_INT_SHIFT (1)
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#define CR0_ALL_INT_MASK (0x7 << CR0_ALL_INT_SHIFT)
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/*indicator of object proximity detection*/
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#define CR0_PROX_CLEAR 0x0
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#define CR0_PROX_SHIFT (3)
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#define CR0_PROX_MASK (0x1 << CR0_PROX_SHIFT)
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/*interrupt status of proximity sensor*/
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#define CR0_INTP_CLEAR 0x0
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#define CR0_INTP_SHIFT (2)
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#define CR0_INTP_MASK (0x1 << CR0_INTP_SHIFT)
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/*interrupt status of ambient sensor*/
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#define CR0_INTA_CLEAR 0x0
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#define CR0_INTA_SHIFT (1)
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#define CR0_INTA_MASK (0x1 << CR0_INTA_SHIFT)
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/*Word mode enable*/
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#define CR0_WORD_EN 0x1
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#define CR0_WORD_SHIFT (0)
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#define CR0_WORD_MASK (0x1 << CR0_WORD_SHIFT)
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/*ALS fault queue depth for interrupt enent output*/
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#define CR1_ALS_FQ_1 0x0
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#define CR1_ALS_FQ_4 0x1
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#define CR1_ALS_FQ_8 0x2
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#define CR1_ALS_FQ_16 0x3
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#define CR1_ALS_FQ_24 0x4
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#define CR1_ALS_FQ_32 0x5
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#define CR1_ALS_FQ_48 0x6
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#define CR1_ALS_FQ_63 0x7
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#define CR1_ALS_FQ_SHIFT (5)
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#define CR1_ALS_FQ_MASK (0x7 << CR1_ALS_FQ_SHIFT)
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/*resolution for ALS*/
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#define CR1_ALS_RES_12BIT 0x0
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#define CR1_ALS_RES_14BIT 0x1
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#define CR1_ALS_RES_16BIT 0x2
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#define CR1_ALS_RES_16BIT_2 0x3
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#define CR1_ALS_RES_SHIFT (3)
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#define CR1_ALS_RES_MASK (0x3 << CR1_ALS_RES_SHIFT)
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/*sensing amplifier selection for ALS*/
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#define CR1_ALS_GAIN_X1 0x0
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#define CR1_ALS_GAIN_X2 0x1
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#define CR1_ALS_GAIN_X4 0x2
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#define CR1_ALS_GAIN_X8 0x3
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#define CR1_ALS_GAIN_X16 0x4
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#define CR1_ALS_GAIN_X32 0x5
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#define CR1_ALS_GAIN_X64 0x6
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#define CR1_ALS_GAIN_X128 0x7
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#define CR1_ALS_GAIN_SHIFT (0)
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#define CR1_ALS_GAIN_MASK (0x7 << CR1_ALS_GAIN_SHIFT)
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/*PS fault queue depth for interrupt event output*/
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#define CR2_PS_FQ_1 0x0
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#define CR2_PS_FQ_4 0x1
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#define CR2_PS_FQ_8 0x2
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#define CR2_PS_FQ_15 0x3
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#define CR2_PS_FQ_SHIFT (6)
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#define CR2_PS_FQ_MASK (0x3 << CR2_PS_FQ_SHIFT)
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/*interrupt type setting */
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/*low active*/
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#define CR2_INT_LEVEL 0x0
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/*low pulse*/
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#define CR2_INT_PULSE 0x1
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#define CR2_INT_SHIFT (5)
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#define CR2_INT_MASK (0x1 << CR2_INT_SHIFT)
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/*resolution for PS*/
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#define CR2_PS_RES_12 0x0
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#define CR2_PS_RES_14 0x1
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#define CR2_PS_RES_16 0x2
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#define CR2_PS_RES_16_2 0x3
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#define CR2_PS_RES_SHIFT (3)
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#define CR2_PS_RES_MASK (0x3 << CR2_PS_RES_SHIFT)
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/*sensing amplifier selection for PS*/
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#define CR2_PS_GAIN_1 0x0
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#define CR2_PS_GAIN_2 0x1
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#define CR2_PS_GAIN_4 0x2
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#define CR2_PS_GAIN_8 0x3
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#define CR2_PS_GAIN_16 0x4
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#define CR2_PS_GAIN_32 0x5
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#define CR2_PS_GAIN_64 0x6
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#define CR2_PS_GAIN_128 0x7
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#define CR2_PS_GAIN_SHIFT (0)
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#define CR2_PS_GAIN_MASK (0x7 << CR2_PS_GAIN_SHIFT)
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/*wait-time slot selection*/
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#define CR3_WAIT_SEL_0 0x0
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#define CR3_WAIT_SEL_4 0x1
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#define CR3_WAIT_SEL_8 0x2
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#define CR3_WAIT_SEL_16 0x3
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#define CR3_WAIT_SEL_SHIFT (6)
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#define CR3_WAIT_SEL_MASK (0x3 << CR3_WAIT_SEL_SHIFT)
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/*IR-LED drive peak current setting*/
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#define CR3_LEDDR_12_5 0x0
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#define CR3_LEDDR_25 0x1
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#define CR3_LEDDR_50 0x2
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#define CR3_LEDDR_100 0x3
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#define CR3_LEDDR_SHIFT (4)
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#define CR3_LEDDR_MASK (0x3 << CR3_LEDDR_SHIFT)
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/*INT pin source selection*/
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#define CR3_INT_SEL_BATH 0x0
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#define CR3_INT_SEL_ALS 0x1
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#define CR3_INT_SEL_PS 0x2
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#define CR3_INT_SEL_PSAPP 0x3
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#define CR3_INT_SEL_SHIFT (2)
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#define CR3_INT_SEL_MASK (0x3 << CR3_INT_SEL_SHIFT)
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/*software reset for register and core*/
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#define CR3_SOFTRST_EN 0x1
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#define CR3_SOFTRST_SHIFT (0)
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#define CR3_SOFTRST_MASK (0x1 << CR3_SOFTRST_SHIFT)
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/*modulation frequency of LED driver*/
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#define CR10_FREQ_DIV2 0x0
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#define CR10_FREQ_DIV4 0x1
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#define CR10_FREQ_DIV8 0x2
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#define CR10_FREQ_DIV16 0x3
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#define CR10_FREQ_SHIFT (1)
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#define CR10_FREQ_MASK (0x3 << CR10_FREQ_SHIFT)
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/*50/60 Rejection enable*/
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#define CR10_REJ_5060_DIS 0x00
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#define CR10_REJ_5060_EN 0x01
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#define CR10_REJ_5060_SHIFT (0)
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#define CR10_REJ_5060_MASK (0x1 << CR10_REJ_5060_SHIFT)
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#define us5152_NUM_CACHABLE_REGS 0x12
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#endif
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