// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Power key driver for SiRF PrimaII
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*
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* Copyright (c) 2013 - 2014 Cambridge Silicon Radio Limited, a CSR plc group
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* company.
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*/
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/input.h>
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#include <linux/rtc/sirfsoc_rtciobrg.h>
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#include <linux/of.h>
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#include <linux/workqueue.h>
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struct sirfsoc_pwrc_drvdata {
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u32 pwrc_base;
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struct input_dev *input;
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struct delayed_work work;
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};
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#define PWRC_ON_KEY_BIT (1 << 0)
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#define PWRC_INT_STATUS 0xc
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#define PWRC_INT_MASK 0x10
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#define PWRC_PIN_STATUS 0x14
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#define PWRC_KEY_DETECT_UP_TIME 20 /* ms*/
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static int sirfsoc_pwrc_is_on_key_down(struct sirfsoc_pwrc_drvdata *pwrcdrv)
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{
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u32 state = sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base +
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PWRC_PIN_STATUS);
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return !(state & PWRC_ON_KEY_BIT); /* ON_KEY is active low */
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}
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static void sirfsoc_pwrc_report_event(struct work_struct *work)
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{
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struct sirfsoc_pwrc_drvdata *pwrcdrv =
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container_of(work, struct sirfsoc_pwrc_drvdata, work.work);
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if (sirfsoc_pwrc_is_on_key_down(pwrcdrv)) {
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schedule_delayed_work(&pwrcdrv->work,
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msecs_to_jiffies(PWRC_KEY_DETECT_UP_TIME));
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} else {
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input_event(pwrcdrv->input, EV_KEY, KEY_POWER, 0);
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input_sync(pwrcdrv->input);
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}
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}
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static irqreturn_t sirfsoc_pwrc_isr(int irq, void *dev_id)
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{
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struct sirfsoc_pwrc_drvdata *pwrcdrv = dev_id;
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u32 int_status;
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int_status = sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base +
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PWRC_INT_STATUS);
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sirfsoc_rtc_iobrg_writel(int_status & ~PWRC_ON_KEY_BIT,
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pwrcdrv->pwrc_base + PWRC_INT_STATUS);
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input_event(pwrcdrv->input, EV_KEY, KEY_POWER, 1);
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input_sync(pwrcdrv->input);
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schedule_delayed_work(&pwrcdrv->work,
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msecs_to_jiffies(PWRC_KEY_DETECT_UP_TIME));
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return IRQ_HANDLED;
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}
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static void sirfsoc_pwrc_toggle_interrupts(struct sirfsoc_pwrc_drvdata *pwrcdrv,
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bool enable)
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{
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u32 int_mask;
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int_mask = sirfsoc_rtc_iobrg_readl(pwrcdrv->pwrc_base + PWRC_INT_MASK);
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if (enable)
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int_mask |= PWRC_ON_KEY_BIT;
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else
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int_mask &= ~PWRC_ON_KEY_BIT;
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sirfsoc_rtc_iobrg_writel(int_mask, pwrcdrv->pwrc_base + PWRC_INT_MASK);
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}
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static int sirfsoc_pwrc_open(struct input_dev *input)
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{
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struct sirfsoc_pwrc_drvdata *pwrcdrv = input_get_drvdata(input);
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sirfsoc_pwrc_toggle_interrupts(pwrcdrv, true);
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return 0;
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}
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static void sirfsoc_pwrc_close(struct input_dev *input)
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{
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struct sirfsoc_pwrc_drvdata *pwrcdrv = input_get_drvdata(input);
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sirfsoc_pwrc_toggle_interrupts(pwrcdrv, false);
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cancel_delayed_work_sync(&pwrcdrv->work);
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}
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static const struct of_device_id sirfsoc_pwrc_of_match[] = {
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{ .compatible = "sirf,prima2-pwrc" },
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{},
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};
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MODULE_DEVICE_TABLE(of, sirfsoc_pwrc_of_match);
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static int sirfsoc_pwrc_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct sirfsoc_pwrc_drvdata *pwrcdrv;
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int irq;
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int error;
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pwrcdrv = devm_kzalloc(&pdev->dev, sizeof(struct sirfsoc_pwrc_drvdata),
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GFP_KERNEL);
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if (!pwrcdrv) {
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dev_info(&pdev->dev, "Not enough memory for the device data\n");
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return -ENOMEM;
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}
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/*
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* We can't use of_iomap because pwrc is not mapped in memory,
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* the so-called base address is only offset in rtciobrg
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*/
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error = of_property_read_u32(np, "reg", &pwrcdrv->pwrc_base);
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if (error) {
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dev_err(&pdev->dev,
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"unable to find base address of pwrc node in dtb\n");
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return error;
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}
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pwrcdrv->input = devm_input_allocate_device(&pdev->dev);
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if (!pwrcdrv->input)
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return -ENOMEM;
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pwrcdrv->input->name = "sirfsoc pwrckey";
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pwrcdrv->input->phys = "pwrc/input0";
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pwrcdrv->input->evbit[0] = BIT_MASK(EV_KEY);
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input_set_capability(pwrcdrv->input, EV_KEY, KEY_POWER);
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INIT_DELAYED_WORK(&pwrcdrv->work, sirfsoc_pwrc_report_event);
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pwrcdrv->input->open = sirfsoc_pwrc_open;
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pwrcdrv->input->close = sirfsoc_pwrc_close;
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input_set_drvdata(pwrcdrv->input, pwrcdrv);
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/* Make sure the device is quiesced */
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sirfsoc_pwrc_toggle_interrupts(pwrcdrv, false);
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irq = platform_get_irq(pdev, 0);
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error = devm_request_irq(&pdev->dev, irq,
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sirfsoc_pwrc_isr, 0,
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"sirfsoc_pwrc_int", pwrcdrv);
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if (error) {
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dev_err(&pdev->dev, "unable to claim irq %d, error: %d\n",
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irq, error);
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return error;
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}
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error = input_register_device(pwrcdrv->input);
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if (error) {
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dev_err(&pdev->dev,
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"unable to register input device, error: %d\n",
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error);
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return error;
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}
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dev_set_drvdata(&pdev->dev, pwrcdrv);
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device_init_wakeup(&pdev->dev, 1);
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return 0;
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}
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static int __maybe_unused sirfsoc_pwrc_resume(struct device *dev)
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{
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struct sirfsoc_pwrc_drvdata *pwrcdrv = dev_get_drvdata(dev);
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struct input_dev *input = pwrcdrv->input;
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/*
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* Do not mask pwrc interrupt as we want pwrc work as a wakeup source
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* if users touch X_ONKEY_B, see arch/arm/mach-prima2/pm.c
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*/
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mutex_lock(&input->mutex);
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if (input->users)
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sirfsoc_pwrc_toggle_interrupts(pwrcdrv, true);
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mutex_unlock(&input->mutex);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(sirfsoc_pwrc_pm_ops, NULL, sirfsoc_pwrc_resume);
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static struct platform_driver sirfsoc_pwrc_driver = {
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.probe = sirfsoc_pwrc_probe,
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.driver = {
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.name = "sirfsoc-pwrc",
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.pm = &sirfsoc_pwrc_pm_ops,
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.of_match_table = sirfsoc_pwrc_of_match,
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}
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};
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module_platform_driver(sirfsoc_pwrc_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Binghua Duan <Binghua.Duan@csr.com>, Xianglong Du <Xianglong.Du@csr.com>");
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MODULE_DESCRIPTION("CSR Prima2 PWRC Driver");
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MODULE_ALIAS("platform:sirfsoc-pwrc");
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