/*
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* HP i8042 SDC + MSM-58321 BBRTC driver.
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*
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* Copyright (c) 2001 Brian S. Julin
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL").
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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*
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* References:
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* System Device Controller Microprocessor Firmware Theory of Operation
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* for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
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* efirtc.c by Stephane Eranian/Hewlett Packard
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*
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*/
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#include <linux/hp_sdc.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include <linux/miscdevice.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <linux/poll.h>
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#include <linux/rtc.h>
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#include <linux/mutex.h>
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#include <linux/semaphore.h>
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MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
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MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver");
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MODULE_LICENSE("Dual BSD/GPL");
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#define RTC_VERSION "1.10d"
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static unsigned long epoch = 2000;
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static struct semaphore i8042tregs;
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static void hp_sdc_rtc_isr (int irq, void *dev_id,
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uint8_t status, uint8_t data)
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{
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return;
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}
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static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm)
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{
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struct semaphore tsem;
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hp_sdc_transaction t;
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uint8_t tseq[91];
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int i;
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i = 0;
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while (i < 91) {
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tseq[i++] = HP_SDC_ACT_DATAREG |
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HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN;
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tseq[i++] = 0x01; /* write i8042[0x70] */
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tseq[i] = i / 7; /* BBRTC reg address */
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i++;
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tseq[i++] = HP_SDC_CMD_DO_RTCR; /* Trigger command */
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tseq[i++] = 2; /* expect 1 stat/dat pair back. */
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i++; i++; /* buffer for stat/dat pair */
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}
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tseq[84] |= HP_SDC_ACT_SEMAPHORE;
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t.endidx = 91;
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t.seq = tseq;
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t.act.semaphore = &tsem;
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sema_init(&tsem, 0);
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if (hp_sdc_enqueue_transaction(&t)) return -1;
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/* Put ourselves to sleep for results. */
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if (WARN_ON(down_interruptible(&tsem)))
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return -1;
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/* Check for nonpresence of BBRTC */
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if (!((tseq[83] | tseq[90] | tseq[69] | tseq[76] |
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tseq[55] | tseq[62] | tseq[34] | tseq[41] |
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tseq[20] | tseq[27] | tseq[6] | tseq[13]) & 0x0f))
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return -1;
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memset(rtctm, 0, sizeof(struct rtc_time));
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rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10;
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rtctm->tm_mon = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10;
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rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10;
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rtctm->tm_wday = (tseq[48] & 0x0f);
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rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10;
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rtctm->tm_min = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10;
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rtctm->tm_sec = (tseq[6] & 0x0f) + (tseq[13] & 0x0f) * 10;
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return 0;
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}
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static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm)
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{
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struct rtc_time tm, tm_last;
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int i = 0;
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/* MSM-58321 has no read latch, so must read twice and compare. */
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if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1;
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if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
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while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) {
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if (i++ > 4) return -1;
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memcpy(&tm_last, &tm, sizeof(struct rtc_time));
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if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
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}
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memcpy(rtctm, &tm, sizeof(struct rtc_time));
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return 0;
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}
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static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg)
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{
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hp_sdc_transaction t;
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uint8_t tseq[26] = {
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HP_SDC_ACT_PRECMD | HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
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0,
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HP_SDC_CMD_READ_T1, 2, 0, 0,
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HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
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HP_SDC_CMD_READ_T2, 2, 0, 0,
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HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
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HP_SDC_CMD_READ_T3, 2, 0, 0,
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HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
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HP_SDC_CMD_READ_T4, 2, 0, 0,
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HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
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HP_SDC_CMD_READ_T5, 2, 0, 0
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};
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t.endidx = numreg * 5;
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tseq[1] = loadcmd;
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tseq[t.endidx - 4] |= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */
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t.seq = tseq;
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t.act.semaphore = &i8042tregs;
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/* Sleep if output regs in use. */
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if (WARN_ON(down_interruptible(&i8042tregs)))
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return -1;
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if (hp_sdc_enqueue_transaction(&t)) {
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up(&i8042tregs);
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return -1;
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}
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/* Sleep until results come back. */
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if (WARN_ON(down_interruptible(&i8042tregs)))
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return -1;
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up(&i8042tregs);
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return (tseq[5] |
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((uint64_t)(tseq[10]) << 8) | ((uint64_t)(tseq[15]) << 16) |
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((uint64_t)(tseq[20]) << 24) | ((uint64_t)(tseq[25]) << 32));
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}
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/* Read the i8042 real-time clock */
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static inline int hp_sdc_rtc_read_rt(struct timespec64 *res) {
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int64_t raw;
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uint32_t tenms;
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unsigned int days;
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raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5);
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if (raw < 0) return -1;
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tenms = (uint32_t)raw & 0xffffff;
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days = (unsigned int)(raw >> 24) & 0xffff;
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res->tv_nsec = (long)(tenms % 100) * 10000 * 1000;
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res->tv_sec = (tenms / 100) + (time64_t)days * 86400;
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return 0;
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}
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/* Read the i8042 fast handshake timer */
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static inline int hp_sdc_rtc_read_fhs(struct timespec64 *res) {
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int64_t raw;
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unsigned int tenms;
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raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2);
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if (raw < 0) return -1;
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tenms = (unsigned int)raw & 0xffff;
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res->tv_nsec = (long)(tenms % 100) * 10000 * 1000;
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res->tv_sec = (time64_t)(tenms / 100);
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return 0;
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}
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/* Read the i8042 match timer (a.k.a. alarm) */
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static inline int hp_sdc_rtc_read_mt(struct timespec64 *res) {
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int64_t raw;
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uint32_t tenms;
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raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3);
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if (raw < 0) return -1;
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tenms = (uint32_t)raw & 0xffffff;
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res->tv_nsec = (long)(tenms % 100) * 10000 * 1000;
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res->tv_sec = (time64_t)(tenms / 100);
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return 0;
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}
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/* Read the i8042 delay timer */
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static inline int hp_sdc_rtc_read_dt(struct timespec64 *res) {
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int64_t raw;
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uint32_t tenms;
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raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3);
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if (raw < 0) return -1;
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tenms = (uint32_t)raw & 0xffffff;
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res->tv_nsec = (long)(tenms % 100) * 10000 * 1000;
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res->tv_sec = (time64_t)(tenms / 100);
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return 0;
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}
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/* Read the i8042 cycle timer (a.k.a. periodic) */
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static inline int hp_sdc_rtc_read_ct(struct timespec64 *res) {
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int64_t raw;
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uint32_t tenms;
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raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3);
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if (raw < 0) return -1;
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tenms = (uint32_t)raw & 0xffffff;
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res->tv_nsec = (long)(tenms % 100) * 10000 * 1000;
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res->tv_sec = (time64_t)(tenms / 100);
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return 0;
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}
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static int hp_sdc_rtc_proc_show(struct seq_file *m, void *v)
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{
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#define YN(bit) ("no")
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#define NY(bit) ("yes")
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struct rtc_time tm;
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struct timespec64 tv;
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memset(&tm, 0, sizeof(struct rtc_time));
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if (hp_sdc_rtc_read_bbrtc(&tm)) {
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seq_puts(m, "BBRTC\t\t: READ FAILED!\n");
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} else {
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seq_printf(m,
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"rtc_time\t: %ptRt\n"
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"rtc_date\t: %ptRd\n"
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"rtc_epoch\t: %04lu\n",
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&tm, &tm, epoch);
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}
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if (hp_sdc_rtc_read_rt(&tv)) {
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seq_puts(m, "i8042 rtc\t: READ FAILED!\n");
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} else {
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seq_printf(m, "i8042 rtc\t: %lld.%02ld seconds\n",
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(s64)tv.tv_sec, (long)tv.tv_nsec/1000000L);
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}
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if (hp_sdc_rtc_read_fhs(&tv)) {
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seq_puts(m, "handshake\t: READ FAILED!\n");
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} else {
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seq_printf(m, "handshake\t: %lld.%02ld seconds\n",
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(s64)tv.tv_sec, (long)tv.tv_nsec/1000000L);
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}
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if (hp_sdc_rtc_read_mt(&tv)) {
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seq_puts(m, "alarm\t\t: READ FAILED!\n");
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} else {
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seq_printf(m, "alarm\t\t: %lld.%02ld seconds\n",
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(s64)tv.tv_sec, (long)tv.tv_nsec/1000000L);
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}
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if (hp_sdc_rtc_read_dt(&tv)) {
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seq_puts(m, "delay\t\t: READ FAILED!\n");
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} else {
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seq_printf(m, "delay\t\t: %lld.%02ld seconds\n",
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(s64)tv.tv_sec, (long)tv.tv_nsec/1000000L);
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}
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if (hp_sdc_rtc_read_ct(&tv)) {
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seq_puts(m, "periodic\t: READ FAILED!\n");
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} else {
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seq_printf(m, "periodic\t: %lld.%02ld seconds\n",
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(s64)tv.tv_sec, (long)tv.tv_nsec/1000000L);
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}
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seq_printf(m,
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"DST_enable\t: %s\n"
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"BCD\t\t: %s\n"
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"24hr\t\t: %s\n"
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"square_wave\t: %s\n"
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"alarm_IRQ\t: %s\n"
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"update_IRQ\t: %s\n"
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"periodic_IRQ\t: %s\n"
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"periodic_freq\t: %ld\n"
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"batt_status\t: %s\n",
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YN(RTC_DST_EN),
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NY(RTC_DM_BINARY),
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YN(RTC_24H),
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YN(RTC_SQWE),
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YN(RTC_AIE),
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YN(RTC_UIE),
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YN(RTC_PIE),
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1UL,
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1 ? "okay" : "dead");
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return 0;
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#undef YN
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#undef NY
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}
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static int __init hp_sdc_rtc_init(void)
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{
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int ret;
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#ifdef __mc68000__
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if (!MACH_IS_HP300)
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return -ENODEV;
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#endif
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sema_init(&i8042tregs, 1);
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if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr)))
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return ret;
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proc_create_single("driver/rtc", 0, NULL, hp_sdc_rtc_proc_show);
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printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded "
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"(RTC v " RTC_VERSION ")\n");
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return 0;
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}
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static void __exit hp_sdc_rtc_exit(void)
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{
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remove_proc_entry ("driver/rtc", NULL);
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hp_sdc_release_timer_irq(hp_sdc_rtc_isr);
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printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n");
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}
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module_init(hp_sdc_rtc_init);
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module_exit(hp_sdc_rtc_exit);
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