/*******************************************************************************
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Intel PRO/1000 Linux driver
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Copyright(c) 1999 - 2008 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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Linux NICS <linux.nics@intel.com>
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#ifndef _E1000_82541_H_
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#define _E1000_82541_H_
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#define NVM_WORD_SIZE_BASE_SHIFT_82541 (NVM_WORD_SIZE_BASE_SHIFT + 1)
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#define IGP01E1000_PHY_CHANNEL_NUM 4
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#define IGP01E1000_PHY_AGC_A 0x1172
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#define IGP01E1000_PHY_AGC_B 0x1272
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#define IGP01E1000_PHY_AGC_C 0x1472
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#define IGP01E1000_PHY_AGC_D 0x1872
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#define IGP01E1000_PHY_AGC_PARAM_A 0x1171
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#define IGP01E1000_PHY_AGC_PARAM_B 0x1271
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#define IGP01E1000_PHY_AGC_PARAM_C 0x1471
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#define IGP01E1000_PHY_AGC_PARAM_D 0x1871
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#define IGP01E1000_PHY_EDAC_MU_INDEX 0xC000
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#define IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS 0x8000
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#define IGP01E1000_PHY_DSP_RESET 0x1F33
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#define IGP01E1000_PHY_DSP_FFE 0x1F35
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#define IGP01E1000_PHY_DSP_FFE_CM_CP 0x0069
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#define IGP01E1000_PHY_DSP_FFE_DEFAULT 0x002A
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#define IGP01E1000_IEEE_FORCE_GIG 0x0140
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#define IGP01E1000_IEEE_RESTART_AUTONEG 0x3300
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#define IGP01E1000_AGC_LENGTH_SHIFT 7
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#define IGP01E1000_AGC_RANGE 10
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#define FFE_IDLE_ERR_COUNT_TIMEOUT_20 20
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#define FFE_IDLE_ERR_COUNT_TIMEOUT_100 100
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#define IGP01E1000_ANALOG_FUSE_STATUS 0x20D0
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#define IGP01E1000_ANALOG_SPARE_FUSE_STATUS 0x20D1
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#define IGP01E1000_ANALOG_FUSE_CONTROL 0x20DC
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#define IGP01E1000_ANALOG_FUSE_BYPASS 0x20DE
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#define IGP01E1000_ANALOG_SPARE_FUSE_ENABLED 0x0100
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#define IGP01E1000_ANALOG_FUSE_FINE_MASK 0x0F80
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#define IGP01E1000_ANALOG_FUSE_COARSE_MASK 0x0070
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#define IGP01E1000_ANALOG_FUSE_COARSE_THRESH 0x0040
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#define IGP01E1000_ANALOG_FUSE_COARSE_10 0x0010
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#define IGP01E1000_ANALOG_FUSE_FINE_1 0x0080
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#define IGP01E1000_ANALOG_FUSE_FINE_10 0x0500
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#define IGP01E1000_ANALOG_FUSE_POLY_MASK 0xF000
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#define IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL 0x0002
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#define IGP01E1000_MSE_CHANNEL_D 0x000F
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#define IGP01E1000_MSE_CHANNEL_C 0x00F0
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#define IGP01E1000_MSE_CHANNEL_B 0x0F00
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#define IGP01E1000_MSE_CHANNEL_A 0xF000
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#endif
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