/*
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* Copyright (C) 2006 Wolfgang Grandegger <wg@grandegger.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <asm/io.h>
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#include <rtdm/driver.h>
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/* CAN device profile */
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#include <rtdm/can.h>
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#include <rtcan_dev.h>
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#include <rtcan_raw.h>
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#include <rtcan_internal.h>
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#include <rtcan_sja1000.h>
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#include <rtcan_sja1000_regs.h>
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#define RTCAN_DEV_NAME "rtcan%d"
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#define RTCAN_DRV_NAME "IXXAT-PCI-CAN"
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static char *ixxat_pci_board_name = "IXXAT-PCI";
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MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
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MODULE_DESCRIPTION("RTCAN board driver for IXXAT-PCI cards");
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MODULE_LICENSE("GPL");
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struct rtcan_ixxat_pci
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{
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struct pci_dev *pci_dev;
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struct rtcan_device *slave_dev;
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int conf_addr;
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void __iomem *base_addr;
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};
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#define IXXAT_PCI_CAN_SYS_CLOCK (16000000 / 2)
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#define CHANNEL_SINGLE 0 /* this is a single channel device */
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#define CHANNEL_MASTER 1 /* multi channel device, this device is master */
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#define CHANNEL_SLAVE 2 /* multi channel device, this is slave */
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#define CHANNEL_OFFSET 0x200
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#define CHANNEL_MASTER_RESET 0x110
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#define CHANNEL_SLAVE_RESET (CHANNEL_MASTER_RESET + CHANNEL_OFFSET)
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#define IXXAT_INTCSR_OFFSET 0x4c /* Offset in PLX9050 conf registers */
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#define IXXAT_INTCSR_SLAVE 0x41 /* LINT1 and PCI interrupt enabled */
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#define IXXAT_INTCSR_MASTER 0x08 /* LINT2 enabled */
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#define IXXAT_SJA_MOD_MASK 0xa1 /* Mask for reading dual/single channel */
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/* PCI vender, device and sub-device ID */
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#define IXXAT_PCI_VENDOR_ID 0x10b5
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#define IXXAT_PCI_DEVICE_ID 0x9050
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#define IXXAT_PCI_SUB_SYS_ID 0x2540
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#define IXXAT_CONF_PORT_SIZE 0x0080
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#define IXXAT_BASE_PORT_SIZE 0x0400
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static struct pci_device_id ixxat_pci_tbl[] = {
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{IXXAT_PCI_VENDOR_ID, IXXAT_PCI_DEVICE_ID,
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IXXAT_PCI_VENDOR_ID, IXXAT_PCI_SUB_SYS_ID, 0, 0, 0},
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{ }
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};
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MODULE_DEVICE_TABLE (pci, ixxat_pci_tbl);
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static u8 rtcan_ixxat_pci_read_reg(struct rtcan_device *dev, int port)
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{
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struct rtcan_ixxat_pci *board = (struct rtcan_ixxat_pci *)dev->board_priv;
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return readb(board->base_addr + port);
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}
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static void rtcan_ixxat_pci_write_reg(struct rtcan_device *dev, int port, u8 data)
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{
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struct rtcan_ixxat_pci *board = (struct rtcan_ixxat_pci *)dev->board_priv;
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writeb(data, board->base_addr + port);
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}
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static void rtcan_ixxat_pci_del_chan(struct rtcan_device *dev)
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{
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struct rtcan_ixxat_pci *board;
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u8 intcsr;
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if (!dev)
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return;
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board = (struct rtcan_ixxat_pci *)dev->board_priv;
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printk("Removing %s %s device %s\n",
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ixxat_pci_board_name, dev->ctrl_name, dev->name);
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rtcan_sja1000_unregister(dev);
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/* Disable PCI interrupts */
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intcsr = inb(board->conf_addr + IXXAT_INTCSR_OFFSET);
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if (board->slave_dev) {
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intcsr &= ~IXXAT_INTCSR_MASTER;
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outb(intcsr, board->conf_addr + IXXAT_INTCSR_OFFSET);
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writeb(0x1, board->base_addr + CHANNEL_MASTER_RESET);
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iounmap(board->base_addr);
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} else {
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intcsr &= ~IXXAT_INTCSR_SLAVE;
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outb(intcsr, board->conf_addr + IXXAT_INTCSR_OFFSET);
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writeb(0x1, board->base_addr + CHANNEL_SLAVE_RESET );
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}
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rtcan_dev_free(dev);
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}
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static int rtcan_ixxat_pci_add_chan(struct pci_dev *pdev,
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int channel,
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struct rtcan_device **master_dev,
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int conf_addr,
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void __iomem *base_addr)
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{
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struct rtcan_device *dev;
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struct rtcan_sja1000 *chip;
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struct rtcan_ixxat_pci *board;
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u8 intcsr;
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int ret;
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dev = rtcan_dev_alloc(sizeof(struct rtcan_sja1000),
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sizeof(struct rtcan_ixxat_pci));
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if (dev == NULL)
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return -ENOMEM;
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chip = (struct rtcan_sja1000 *)dev->priv;
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board = (struct rtcan_ixxat_pci *)dev->board_priv;
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board->pci_dev = pdev;
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board->conf_addr = conf_addr;
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board->base_addr = base_addr;
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if (channel == CHANNEL_SLAVE) {
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struct rtcan_ixxat_pci *master_board =
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(struct rtcan_ixxat_pci *)(*master_dev)->board_priv;
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master_board->slave_dev = dev;
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}
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dev->board_name = ixxat_pci_board_name;
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chip->read_reg = rtcan_ixxat_pci_read_reg;
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chip->write_reg = rtcan_ixxat_pci_write_reg;
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/* Clock frequency in Hz */
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dev->can_sys_clock = IXXAT_PCI_CAN_SYS_CLOCK;
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/* Output control register */
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chip->ocr = (SJA_OCR_MODE_NORMAL | SJA_OCR_TX0_INVERT |
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SJA_OCR_TX0_PUSHPULL | SJA_OCR_TX1_PUSHPULL);
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/* Clock divider register */
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chip->cdr = SJA_CDR_CAN_MODE;
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strncpy(dev->name, RTCAN_DEV_NAME, IFNAMSIZ);
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/* Enable PCI interrupts */
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intcsr = inb(board->conf_addr + IXXAT_INTCSR_OFFSET);
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if (channel == CHANNEL_SLAVE)
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intcsr |= IXXAT_INTCSR_SLAVE;
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else
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intcsr |= IXXAT_INTCSR_MASTER;
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outb(intcsr, board->conf_addr + IXXAT_INTCSR_OFFSET);
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/* Register and setup interrupt handling */
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chip->irq_flags = RTDM_IRQTYPE_SHARED;
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chip->irq_num = pdev->irq;
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RTCAN_DBG("%s: base_addr=0x%p conf_addr=%#x irq=%d ocr=%#x cdr=%#x\n",
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RTCAN_DRV_NAME, board->base_addr, board->conf_addr,
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chip->irq_num, chip->ocr, chip->cdr);
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/* Register SJA1000 device */
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ret = rtcan_sja1000_register(dev);
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if (ret) {
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printk(KERN_ERR "ERROR %d while trying to register SJA1000 device!\n",
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ret);
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goto failure;
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}
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if (channel != CHANNEL_SLAVE)
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*master_dev = dev;
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return 0;
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failure:
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rtcan_dev_free(dev);
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return ret;
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}
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static int ixxat_pci_init_one(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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int ret, channel, conf_addr;
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unsigned long addr;
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void __iomem *base_addr;
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struct rtcan_device *master_dev = NULL;
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if (!rtdm_available())
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return -ENODEV;
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if ((ret = pci_enable_device (pdev)))
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goto failure;
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if ((ret = pci_request_regions(pdev, RTCAN_DRV_NAME)))
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goto failure;
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RTCAN_DBG("%s: Initializing device %04x:%04x:%04x\n",
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RTCAN_DRV_NAME, pdev->vendor, pdev->device,
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pdev->subsystem_device);
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/* Enable memory and I/O space */
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if ((ret = pci_write_config_word(pdev, 0x04, 0x3)))
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goto failure_release_pci;
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conf_addr = pci_resource_start(pdev, 1);
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addr = pci_resource_start(pdev, 2);
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base_addr = ioremap(addr, IXXAT_BASE_PORT_SIZE);
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if (base_addr == 0) {
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ret = -ENODEV;
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goto failure_release_pci;
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}
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/* Check if second channel is available after reset */
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writeb(0x1, base_addr + CHANNEL_MASTER_RESET);
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writeb(0x1, base_addr + CHANNEL_SLAVE_RESET);
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udelay(100);
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if ( (readb(base_addr + CHANNEL_OFFSET + SJA_MOD) & IXXAT_SJA_MOD_MASK ) != 0x21 ||
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readb(base_addr + CHANNEL_OFFSET + SJA_SR ) != 0x0c ||
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readb(base_addr + CHANNEL_OFFSET + SJA_IR ) != 0xe0)
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channel = CHANNEL_SINGLE;
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else
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channel = CHANNEL_MASTER;
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if ((ret = rtcan_ixxat_pci_add_chan(pdev, channel, &master_dev,
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conf_addr, base_addr)))
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goto failure_iounmap;
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if (channel != CHANNEL_SINGLE) {
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channel = CHANNEL_SLAVE;
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if ((ret = rtcan_ixxat_pci_add_chan(pdev, channel,
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&master_dev, conf_addr,
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base_addr + CHANNEL_OFFSET)))
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goto failure_iounmap;
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}
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pci_set_drvdata(pdev, master_dev);
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return 0;
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failure_iounmap:
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if (master_dev)
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rtcan_ixxat_pci_del_chan(master_dev);
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iounmap(base_addr);
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failure_release_pci:
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pci_release_regions(pdev);
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failure:
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return ret;
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}
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static void ixxat_pci_remove_one(struct pci_dev *pdev)
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{
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struct rtcan_device *dev = pci_get_drvdata(pdev);
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struct rtcan_ixxat_pci *board = (struct rtcan_ixxat_pci *)dev->board_priv;
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if (board->slave_dev)
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rtcan_ixxat_pci_del_chan(board->slave_dev);
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rtcan_ixxat_pci_del_chan(dev);
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pci_release_regions(pdev);
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pci_disable_device(pdev);
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pci_set_drvdata(pdev, NULL);
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}
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static struct pci_driver rtcan_ixxat_pci_driver = {
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.name = RTCAN_DRV_NAME,
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.id_table = ixxat_pci_tbl,
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.probe = ixxat_pci_init_one,
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.remove = ixxat_pci_remove_one,
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};
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module_pci_driver(rtcan_ixxat_pci_driver);
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