/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_IMAGE_H
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#define __ASM_IMAGE_H
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#define ARM64_IMAGE_MAGIC "ARM\x64"
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#define ARM64_IMAGE_FLAG_BE_SHIFT 0
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#define ARM64_IMAGE_FLAG_PAGE_SIZE_SHIFT (ARM64_IMAGE_FLAG_BE_SHIFT + 1)
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#define ARM64_IMAGE_FLAG_PHYS_BASE_SHIFT \
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(ARM64_IMAGE_FLAG_PAGE_SIZE_SHIFT + 2)
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#define ARM64_IMAGE_FLAG_BE_MASK 0x1
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#define ARM64_IMAGE_FLAG_PAGE_SIZE_MASK 0x3
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#define ARM64_IMAGE_FLAG_PHYS_BASE_MASK 0x1
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#define ARM64_IMAGE_FLAG_LE 0
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#define ARM64_IMAGE_FLAG_BE 1
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#define ARM64_IMAGE_FLAG_PAGE_SIZE_4K 1
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#define ARM64_IMAGE_FLAG_PAGE_SIZE_16K 2
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#define ARM64_IMAGE_FLAG_PAGE_SIZE_64K 3
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#define ARM64_IMAGE_FLAG_PHYS_BASE 1
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#ifndef __ASSEMBLY__
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#define arm64_image_flag_field(flags, field) \
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(((flags) >> field##_SHIFT) & field##_MASK)
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/*
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* struct arm64_image_header - arm64 kernel image header
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* See Documentation/arm64/booting.rst for details
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*
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* @code0: Executable code, or
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* @mz_header alternatively used for part of MZ header
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* @code1: Executable code
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* @text_offset: Image load offset
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* @image_size: Effective Image size
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* @flags: kernel flags
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* @reserved: reserved
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* @magic: Magic number
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* @reserved5: reserved, or
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* @pe_header: alternatively used for PE COFF offset
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*/
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struct arm64_image_header {
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__le32 code0;
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__le32 code1;
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__le64 text_offset;
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__le64 image_size;
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__le64 flags;
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__le64 res2;
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__le64 res3;
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__le64 res4;
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__le32 magic;
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__le32 res5;
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};
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_IMAGE_H */
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