/** @file
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Copyright (c) 2011 - 2019, Intel Corporaton. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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The original software modules are licensed as follows:
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Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
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Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "PhyDxeUtil.h"
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#include "EmacDxeUtil.h"
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/TimerLib.h>
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#include <Library/UefiLib.h>
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EFI_STATUS
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EFIAPI
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PhyDxeInitialization (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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EFI_STATUS Status;
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DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __FUNCTION__));
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// initialize the phyaddr
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PhyDriver->PhyAddr = 0;
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PhyDriver->PhyCurrentLink = LINK_DOWN;
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PhyDriver->PhyOldLink = LINK_DOWN;
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Status = PhyDetectDevice (PhyDriver, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return EFI_NOT_FOUND;
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}
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PhyConfig (PhyDriver, MacBaseAddress);
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return EFI_SUCCESS;
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}
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// PHY detect device
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EFI_STATUS
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EFIAPI
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PhyDetectDevice (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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UINT32 PhyAddr;
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EFI_STATUS Status;
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DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __FUNCTION__));
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for (PhyAddr = 0; PhyAddr < 32; PhyAddr++) {
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Status = PhyReadId (PhyAddr, MacBaseAddress);
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if (EFI_ERROR(Status)) {
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continue;
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}
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PhyDriver->PhyAddr = PhyAddr;
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return EFI_SUCCESS;
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}
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DEBUG ((DEBUG_INFO, "SNP:PHY: Fail to detect Ethernet PHY!\r\n"));
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return EFI_NOT_FOUND;
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}
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EFI_STATUS
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EFIAPI
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PhyConfig (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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EFI_STATUS Status;
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DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __FUNCTION__));
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Status = PhySoftReset (PhyDriver, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return EFI_DEVICE_ERROR;
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}
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// Configure TX/RX Skew
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PhyConfigSkew (PhyDriver, MacBaseAddress);
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// Read back and display Skew settings
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PhyDisplayConfigSkew (PhyDriver, MacBaseAddress);
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// Configure AN FLP Burst Trasmit timing interval
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PhyConfigFlpBurstTiming (PhyDriver, MacBaseAddress);
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PhyDisplayFlpBurstTiming (PhyDriver, MacBaseAddress);
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// Configure AN and Advertise
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PhyAutoNego (PhyDriver, MacBaseAddress);
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return EFI_SUCCESS;
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}
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// Perform PHY software reset
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EFI_STATUS
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EFIAPI
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PhySoftReset (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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UINT32 TimeOut;
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UINT32 Data32;
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EFI_STATUS Status;
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DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __FUNCTION__));
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// PHY Basic Control Register reset
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PhyWrite (PhyDriver->PhyAddr, PHY_BASIC_CTRL, PHYCTRL_RESET, MacBaseAddress);
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// Wait for completion
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TimeOut = 0;
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do {
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// Read PHY_BASIC_CTRL register from PHY
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Status = PhyRead (PhyDriver->PhyAddr, PHY_BASIC_CTRL, &Data32, MacBaseAddress);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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// Wait until PHYCTRL_RESET become zero
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if ((Data32 & PHYCTRL_RESET) == 0) {
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break;
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}
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MicroSecondDelay(1);
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} while (TimeOut++ < PHY_TIMEOUT);
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if (TimeOut >= PHY_TIMEOUT) {
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DEBUG ((DEBUG_INFO, "SNP:PHY: ERROR! PhySoftReset timeout\n"));
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return EFI_TIMEOUT;
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}
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return EFI_SUCCESS;
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}
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// PHY read ID
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EFI_STATUS
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EFIAPI
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PhyReadId (
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IN UINT32 PhyAddr,
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IN UINTN MacBaseAddress
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)
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{
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EFI_STATUS Status;
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UINT32 PhyId1;
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UINT32 PhyId2;
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Status = PhyRead (PhyAddr, PHY_ID1, &PhyId1, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Status = PhyRead (PhyAddr, PHY_ID2, &PhyId2, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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if (PhyId1 == PHY_INVALID_ID || PhyId2 == PHY_INVALID_ID) {
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return EFI_NOT_FOUND;
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}
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DEBUG ((DEBUG_INFO, "SNP:PHY: Ethernet PHY detected. PHY_ID1=0x%04X, PHY_ID2=0x%04X, PHY_ADDR=0x%02X\r\n",
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PhyId1, PhyId2, PhyAddr));
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return EFI_SUCCESS;
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}
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VOID
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EFIAPI
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PhyConfigSkew (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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Phy9031ExtendedWrite (PhyDriver,
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PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_DEV_ADDR, PHY_KSZ9031RN_CONTROL_PAD_SKEW_REG,
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PHY_KSZ9031RN_CONTROL_PAD_SKEW_VALUE,
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MacBaseAddress);
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Phy9031ExtendedWrite (PhyDriver,
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PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_DEV_ADDR, PHY_KSZ9031RN_CLK_PAD_SKEW_REG,
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PHY_KSZ9031RN_CLK_PAD_SKEW_VALUE,
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MacBaseAddress);
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Phy9031ExtendedWrite (PhyDriver,
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PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_DEV_ADDR,
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PHY_KSZ9031RN_RX_DATA_PAD_SKEW_REG,
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PHY_KSZ9031RN_RX_DATA_PAD_SKEW_VALUE,
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MacBaseAddress);
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Phy9031ExtendedWrite (PhyDriver,
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PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_DEV_ADDR,
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PHY_KSZ9031RN_TX_DATA_PAD_SKEW_REG,
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PHY_KSZ9031RN_TX_DATA_PAD_SKEW_VALUE,
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MacBaseAddress);
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}
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VOID
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EFIAPI
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PhyDisplayConfigSkew (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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// Display skew configuration
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DEBUG ((DEBUG_INFO, "SNP:PHY: Control Signal Pad Skew = 0x%04X\r\n",
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Phy9031ExtendedRead (PhyDriver, PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_DEV_ADDR, PHY_KSZ9031RN_CONTROL_PAD_SKEW_REG, MacBaseAddress)));
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DEBUG ((DEBUG_INFO, "SNP:PHY: RGMII Clock Pad Skew = 0x%04X\r\n",
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Phy9031ExtendedRead (PhyDriver, PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_DEV_ADDR, PHY_KSZ9031RN_CLK_PAD_SKEW_REG, MacBaseAddress)));
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DEBUG ((DEBUG_INFO, "SNP:PHY: RGMII RX Data Pad Skew = 0x%04X\r\n",
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Phy9031ExtendedRead (PhyDriver, PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_DEV_ADDR, PHY_KSZ9031RN_RX_DATA_PAD_SKEW_REG, MacBaseAddress)));
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DEBUG ((DEBUG_INFO, "SNP:PHY: RGMII TX Data Pad Skew = 0x%04X\r\n",
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Phy9031ExtendedRead (PhyDriver, PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_DEV_ADDR, PHY_KSZ9031RN_TX_DATA_PAD_SKEW_REG, MacBaseAddress)));
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}
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VOID
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EFIAPI
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PhyConfigFlpBurstTiming (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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Phy9031ExtendedWrite (PhyDriver,
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PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_MMD_DEV_ADDR_00,
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PHY_KSZ9031RN_MMD_D0_FLP_LO_REG,
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PHY_KSZ9031RN_MMD_D0_FLP_16MS_LO,
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MacBaseAddress);
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Phy9031ExtendedWrite (PhyDriver,
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PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_MMD_DEV_ADDR_00,
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PHY_KSZ9031RN_MMD_D0_FLP_HI_REG,
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PHY_KSZ9031RN_MMD_D0_FLP_16MS_HI,
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MacBaseAddress);
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}
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VOID
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EFIAPI
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PhyDisplayFlpBurstTiming (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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// Display Auto-Negotiation FLP burst transmit timing
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DEBUG ((DEBUG_INFO, "SNP:PHY: AN FLP Burst Transmit - LO = 0x%04X\r\n",
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Phy9031ExtendedRead (PhyDriver, PHY_KSZ9031_MOD_DATA_NO_POST_INC,
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PHY_KSZ9031RN_MMD_DEV_ADDR_00, PHY_KSZ9031RN_MMD_D0_FLP_LO_REG, MacBaseAddress)));
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DEBUG ((DEBUG_INFO, "SNP:PHY: AN FLP Burst Transmit - HI = 0x%04X\r\n",
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Phy9031ExtendedRead (PhyDriver, PHY_KSZ9031_MOD_DATA_NO_POST_INC, PHY_KSZ9031RN_MMD_DEV_ADDR_00,
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PHY_KSZ9031RN_MMD_D0_FLP_HI_REG, MacBaseAddress)));
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}
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// Do auto-negotiation
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EFI_STATUS
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EFIAPI
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PhyAutoNego (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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EFI_STATUS Status;
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UINT32 PhyControl;
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UINT32 PhyStatus;
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UINT32 Features;
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DEBUG ((DEBUG_INFO, "SNP:PHY: %a ()\r\n", __FUNCTION__));
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// Read PHY Status
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Status = PhyRead (PhyDriver->PhyAddr, PHY_BASIC_STATUS, &PhyStatus, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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// Check PHY Status if auto-negotiation is supported
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if ((PhyStatus & PHYSTS_AUTO_CAP) == 0) {
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DEBUG ((DEBUG_INFO, "SNP:PHY: Auto-negotiation is not supported.\n"));
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return EFI_DEVICE_ERROR;
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}
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// Read PHY Auto-Nego Advertise capabilities register for 10/100 Base-T
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Status = PhyRead (PhyDriver->PhyAddr, PHY_AUTO_NEG_ADVERT, &Features, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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// Set Advertise capabilities for 10Base-T/10Base-T full-duplex/100Base-T/100Base-T full-duplex
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Features |= (PHYANA_10BASET | PHYANA_10BASETFD | PHYANA_100BASETX | PHYANA_100BASETXFD);
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PhyWrite (PhyDriver->PhyAddr, PHY_AUTO_NEG_ADVERT, Features, MacBaseAddress);
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// Read PHY Auto-Nego Advertise capabilities register for 1000 Base-T
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Status = PhyRead (PhyDriver->PhyAddr, PHY_1000BASE_T_CONTROL, &Features, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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// Set Advertise capabilities for 1000 Base-T/1000 Base-T full-duplex
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Features |= (PHYADVERTISE_1000FULL | PHYADVERTISE_1000HALF);
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PhyWrite (PhyDriver->PhyAddr, PHY_1000BASE_T_CONTROL, Features, MacBaseAddress);
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// Read control register
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Status = PhyRead (PhyDriver->PhyAddr, PHY_BASIC_CTRL, &PhyControl, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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// Enable Auto-Negotiation
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PhyControl |= PHYCTRL_AUTO_EN;
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// Restart auto-negotiation
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PhyControl |= PHYCTRL_RST_AUTO;
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// Write this configuration
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PhyWrite (PhyDriver->PhyAddr, PHY_BASIC_CTRL, PhyControl, MacBaseAddress);
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return EFI_SUCCESS;
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}
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EFI_STATUS
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EFIAPI
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PhyLinkAdjustEmacConfig (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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UINT32 Speed;
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UINT32 Duplex;
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EFI_STATUS Status;
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Status = EFI_SUCCESS;
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Speed = SPEED_10;
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Duplex = DUPLEX_HALF;
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Status = PhyCheckLinkStatus (PhyDriver, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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PhyDriver->PhyCurrentLink = LINK_DOWN;
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} else {
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PhyDriver->PhyCurrentLink = LINK_UP;
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}
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if (PhyDriver->PhyOldLink != PhyDriver->PhyCurrentLink) {
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if (PhyDriver->PhyCurrentLink == LINK_UP) {
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DEBUG ((DEBUG_INFO, "SNP:PHY: Link is up - Network Cable is Plugged\r\n"));
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PhyReadCapability (PhyDriver, &Speed, &Duplex, MacBaseAddress);
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EmacConfigAdjust (Speed, Duplex, MacBaseAddress);
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Status = EFI_SUCCESS;
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} else {
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DEBUG ((DEBUG_INFO, "SNP:PHY: Link is Down - Network Cable is Unplugged?\r\n"));
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Status = EFI_NOT_READY;
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}
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} else if (PhyDriver->PhyCurrentLink == LINK_DOWN) {
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Status = EFI_NOT_READY;
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}
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PhyDriver->PhyOldLink = PhyDriver->PhyCurrentLink;
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return Status;
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}
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EFI_STATUS
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EFIAPI
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PhyCheckLinkStatus (
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IN PHY_DRIVER *PhyDriver,
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IN UINTN MacBaseAddress
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)
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{
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EFI_STATUS Status;
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UINT32 Data32;
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UINTN TimeOut;
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UINT32 PhyBasicStatus;
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// Get the PHY Status
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Status = PhyRead (PhyDriver->PhyAddr, PHY_BASIC_STATUS, &PhyBasicStatus, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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// if Link is already up then dont need to proceed anymore
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if (PhyBasicStatus & PHYSTS_LINK_STS) {
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return EFI_SUCCESS;
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}
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// Wait until it is up or until Time Out
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TimeOut = 0;
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do {
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// Read PHY_BASIC_STATUS register from PHY
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Status = PhyRead (PhyDriver->PhyAddr, PHY_BASIC_STATUS, &Data32, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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// Wait until PHYSTS_LINK_STS become one
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if (Data32 & PHYSTS_LINK_STS) {
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// Link is up
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break;
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}
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MicroSecondDelay (1);
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} while (TimeOut++ < PHY_TIMEOUT);
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if (TimeOut >= PHY_TIMEOUT) {
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// Link is down
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return EFI_TIMEOUT;
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}
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// Wait until autonego process has completed
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TimeOut = 0;
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do {
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// Read PHY_BASIC_STATUS register from PHY
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Status = PhyRead (PhyDriver->PhyAddr, PHY_BASIC_STATUS, &Data32, MacBaseAddress);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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// Wait until PHYSTS_AUTO_COMP become one
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if (Data32 & PHYSTS_AUTO_COMP) {
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DEBUG ((DEBUG_INFO, "SNP:PHY: Auto Negotiation completed\r\n"));
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break;
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}
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MicroSecondDelay (1);
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} while (TimeOut++ < PHY_TIMEOUT);
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if (TimeOut >= PHY_TIMEOUT) {
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DEBUG ((DEBUG_INFO, "SNP:PHY: Error! Auto Negotiation timeout\n"));
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return EFI_TIMEOUT;
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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EFIAPI
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PhyReadCapability (
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IN PHY_DRIVER *PhyDriver,
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IN UINT32 *Speed,
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IN UINT32 *Duplex,
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IN UINTN MacBaseAddress
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)
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{
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EFI_STATUS Status;
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UINT32 PartnerAbilityGb;
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UINT32 AdvertisingGb;
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UINT32 CommonAbilityGb;
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UINT32 PartnerAbility;
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UINT32 Advertising;
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UINT32 CommonAbility;
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// For 1000 Base-T
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Status = PhyRead (PhyDriver->PhyAddr, PHY_1000BASE_T_STATUS, &PartnerAbilityGb, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Status = PhyRead (PhyDriver->PhyAddr, PHY_1000BASE_T_CONTROL, &AdvertisingGb, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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CommonAbilityGb = PartnerAbilityGb & (AdvertisingGb << 2);
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// For 10/100 Base-T
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Status = PhyRead (PhyDriver->PhyAddr, PHY_AUTO_NEG_LINK_ABILITY, &PartnerAbility, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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Status = PhyRead (PhyDriver->PhyAddr, PHY_AUTO_NEG_EXP, &Advertising, MacBaseAddress);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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CommonAbility = PartnerAbility & Advertising;
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// Determine the Speed and Duplex
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if (PartnerAbilityGb & (PHYLPA_1000FULL | PHYLPA_1000HALF)) {
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*Speed = SPEED_1000;
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if (CommonAbilityGb & PHYLPA_1000FULL) {
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*Duplex = DUPLEX_FULL;
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}
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} else if (CommonAbility & (PHYLPA_100FULL | PHYLPA_100HALF)) {
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*Speed = SPEED_100;
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if (CommonAbility & PHYLPA_100FULL) {
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*Duplex = DUPLEX_FULL;
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} else if (CommonAbility & PHYLPA_10FULL) {
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*Duplex = DUPLEX_FULL;
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}
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}
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PhyDisplayAbility (*Speed, *Duplex);
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return EFI_SUCCESS;
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}
|
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VOID
|
EFIAPI
|
PhyDisplayAbility (
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IN UINT32 Speed,
|
IN UINT32 Duplex
|
)
|
{
|
|
DEBUG ((DEBUG_INFO, "SNP:PHY: "));
|
switch (Speed) {
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case SPEED_1000:
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DEBUG ((DEBUG_INFO, "1 Gbps - "));
|
break;
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case SPEED_100:
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DEBUG ((DEBUG_INFO, "100 Mbps - "));
|
break;
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case SPEED_10:
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DEBUG ((DEBUG_INFO, "10 Mbps - "));
|
break;
|
default:
|
DEBUG ((DEBUG_INFO, "Invalid link speed"));
|
break;
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}
|
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switch (Duplex) {
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case DUPLEX_FULL:
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DEBUG ((DEBUG_INFO, "Full Duplex\n"));
|
break;
|
case DUPLEX_HALF:
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DEBUG ((DEBUG_INFO, "Half Duplex\n"));
|
break;
|
default:
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DEBUG ((DEBUG_INFO, "Invalid duplex mode\n"));
|
break;
|
}
|
}
|
|
|
// Function to read from MII register (PHY Access)
|
EFI_STATUS
|
EFIAPI
|
PhyRead (
|
IN UINT32 Addr,
|
IN UINT32 Reg,
|
OUT UINT32 *Data,
|
IN UINTN MacBaseAddress
|
)
|
{
|
UINT32 MiiConfig;
|
UINT32 Count;
|
|
// Check it is a valid Reg
|
ASSERT (Reg < 31);
|
|
MiiConfig = ((Addr << MIIADDRSHIFT) & MII_ADDRMSK) |
|
((Reg << MIIREGSHIFT) & MII_REGMSK)|
|
MII_CLKRANGE_150_250M |
|
MII_BUSY;
|
|
// write this config to register
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MmioWrite32 (MacBaseAddress + DW_EMAC_GMACGRP_GMII_ADDRESS_OFST, MiiConfig);
|
|
// Wait for busy bit to clear
|
Count = 0;
|
while (Count < 10000) {
|
if (!(DW_EMAC_GMACGRP_GMII_ADDRESS_GB_GET (MmioRead32 (MacBaseAddress + DW_EMAC_GMACGRP_GMII_ADDRESS_OFST)))) {
|
*Data = DW_EMAC_GMACGRP_GMII_DATA_GD_GET (MmioRead32 (MacBaseAddress + DW_EMAC_GMACGRP_GMII_DATA_OFST));
|
return EFI_SUCCESS;
|
}
|
MemoryFence ();
|
Count++;
|
};
|
DEBUG ((DEBUG_INFO, "SNP:PHY: MDIO busy bit timeout\r\n"));
|
return EFI_TIMEOUT;
|
}
|
|
|
// Function to write to the MII register (PHY Access)
|
EFI_STATUS
|
EFIAPI
|
PhyWrite (
|
IN UINT32 Addr,
|
IN UINT32 Reg,
|
IN UINT32 Data,
|
IN UINTN MacBaseAddress
|
)
|
{
|
UINT32 MiiConfig;
|
UINT32 Count;
|
|
// Check it is a valid Reg
|
ASSERT(Reg < 31);
|
|
MiiConfig = ((Addr << MIIADDRSHIFT) & MII_ADDRMSK) |
|
((Reg << MIIREGSHIFT) & MII_REGMSK)|
|
MII_WRITE |
|
MII_CLKRANGE_150_250M |
|
MII_BUSY;
|
// Write the desired value to the register first
|
MmioWrite32 (MacBaseAddress + DW_EMAC_GMACGRP_GMII_DATA_OFST, (Data & 0xFFFF));
|
|
// write this config to register
|
MmioWrite32 (MacBaseAddress + DW_EMAC_GMACGRP_GMII_ADDRESS_OFST, MiiConfig);
|
|
// Wait for busy bit to clear
|
Count = 0;
|
while (Count < 1000) {
|
if (!(DW_EMAC_GMACGRP_GMII_ADDRESS_GB_GET (MmioRead32 (MacBaseAddress + DW_EMAC_GMACGRP_GMII_ADDRESS_OFST)))) {
|
return EFI_SUCCESS;
|
}
|
MemoryFence ();
|
Count++;
|
};
|
|
return EFI_TIMEOUT;
|
}
|
|
|
EFI_STATUS
|
EFIAPI
|
Phy9031ExtendedWrite (
|
IN PHY_DRIVER *PhyDriver,
|
IN UINT32 Mode,
|
IN UINT32 DevAddr,
|
IN UINT32 Regnum,
|
IN UINT16 Val,
|
IN UINTN MacBaseAddress
|
)
|
{
|
PhyWrite (PhyDriver->PhyAddr, PHY_KSZ9031RN_MMD_CTRL_REG, DevAddr, MacBaseAddress);
|
PhyWrite (PhyDriver->PhyAddr, PHY_KSZ9031RN_MMD_REGDATA_REG, Regnum, MacBaseAddress);
|
PhyWrite (PhyDriver->PhyAddr, PHY_KSZ9031RN_MMD_CTRL_REG, (Mode << 14) | DevAddr, MacBaseAddress);
|
return PhyWrite (PhyDriver->PhyAddr, PHY_KSZ9031RN_MMD_REGDATA_REG, Val, MacBaseAddress);
|
}
|
|
|
UINT32
|
EFIAPI
|
Phy9031ExtendedRead (
|
IN PHY_DRIVER *PhyDriver,
|
IN UINT32 Mode,
|
IN UINT32 DevAddr,
|
IN UINT32 Regnum,
|
IN UINTN MacBaseAddress
|
)
|
{
|
EFI_STATUS Status;
|
UINT32 Data32;
|
|
PhyWrite (PhyDriver->PhyAddr, PHY_KSZ9031RN_MMD_CTRL_REG, DevAddr, MacBaseAddress);
|
PhyWrite (PhyDriver->PhyAddr, PHY_KSZ9031RN_MMD_REGDATA_REG, Regnum, MacBaseAddress);
|
PhyWrite (PhyDriver->PhyAddr, PHY_KSZ9031RN_MMD_CTRL_REG, (Mode << 14) | DevAddr, MacBaseAddress);
|
|
Status = PhyRead (PhyDriver->PhyAddr, PHY_KSZ9031RN_MMD_REGDATA_REG, &Data32, MacBaseAddress);
|
if (EFI_ERROR (Status)) {
|
return 0;
|
}
|
|
return Data32;
|
}
|
|
|
