/*
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* (C) Copyright 2019 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <asm/u-boot-arm.h>
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#include <irq-generic.h>
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#include "irq-internal.h"
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DECLARE_GLOBAL_DATA_PTR;
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static LIST_HEAD(virq_desc_head);
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static u32 virq_id = PLATFORM_MAX_IRQ;
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static u32 virq_id_alloc(void)
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{
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return ++virq_id;
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}
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struct virq_data {
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int irq;
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u32 flag;
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u32 count;
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void *data;
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interrupt_handler_t *handle_irq;
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};
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/* The structure to maintail the irqchip and child virqs */
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struct virq_desc {
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struct virq_chip *chip; /* irq chip */
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struct virq_data *virqs; /* child irq data list */
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struct udevice *parent; /* parent device */
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int pirq; /* parent irq */
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int use_count; /* enable count */
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int irq_base; /* child irq base */
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int irq_end; /* child irq end */
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uint reg_stride;
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uint unalign_reg_idx;
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uint unalign_reg_stride;
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uint *status_buf;
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struct list_head node;
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};
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static struct virq_desc *find_virq_desc(int irq)
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{
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struct virq_desc *desc;
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struct list_head *node;
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list_for_each(node, &virq_desc_head) {
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desc = list_entry(node, struct virq_desc, node);
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if (irq >= desc->irq_base && irq <= desc->irq_end)
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return desc;
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}
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return NULL;
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}
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static struct virq_desc *find_virq_desc_by_pirq(int parent_irq)
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{
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struct virq_desc *desc;
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struct list_head *node;
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list_for_each(node, &virq_desc_head) {
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desc = list_entry(node, struct virq_desc, node);
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if (parent_irq == desc->pirq)
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return desc;
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}
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return NULL;
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}
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int virq_to_irq(struct virq_chip *chip, int virq)
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{
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struct virq_desc *desc;
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struct list_head *node;
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int irq;
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if (!chip)
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return -EINVAL;
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list_for_each(node, &virq_desc_head) {
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desc = list_entry(node, struct virq_desc, node);
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if (desc->chip == chip) {
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irq = desc->irq_base + virq;
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if (irq >= desc->irq_base && irq <= desc->irq_end)
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return irq;
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}
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}
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return -ENONET;
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}
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int bad_virq(int irq)
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{
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return !find_virq_desc(irq);
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}
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void virqs_show(int pirq)
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{
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struct virq_data *vdata;
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struct virq_desc *desc;
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struct udevice *dev;
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int num;
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int i;
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desc = find_virq_desc_by_pirq(pirq);
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if (!desc)
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return;
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vdata = desc->virqs;
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num = desc->irq_end - desc->irq_base;
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for (i = 0; i < num; i++) {
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if (!vdata[i].handle_irq)
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continue;
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dev = (struct udevice *)vdata[i].data;
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printf(" %3d %d 0x%08lx %-12s |-- %-12s %d\n",
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vdata[i].irq,
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vdata[i].flag & IRQ_FLG_ENABLE ? 1 : 0,
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(ulong)vdata[i].handle_irq, dev->driver->name, dev->name,
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vdata[i].count);
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}
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}
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int virq_install_handler(int irq, interrupt_handler_t *handler, void *data)
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{
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struct virq_desc *desc;
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int virq;
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if (!handler)
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return -EINVAL;
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desc = find_virq_desc(irq);
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if (!desc)
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return -ENOENT;
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virq = irq - desc->irq_base;
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if (desc->virqs[virq].handle_irq)
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return -EBUSY;
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desc->virqs[virq].handle_irq = handler;
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desc->virqs[virq].data = data;
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return 0;
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}
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void virq_free_handler(int irq)
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{
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struct virq_desc *desc;
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int virq;
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desc = find_virq_desc(irq);
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if (!desc)
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return;
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virq = irq - desc->irq_base;
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desc->virqs[virq].handle_irq = NULL;
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desc->virqs[virq].data = NULL;
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}
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static uint reg_base_get(struct virq_desc *desc, uint reg_base, int idx)
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{
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int reg_addr;
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if (idx <= desc->unalign_reg_idx) {
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reg_addr = reg_base + (idx * desc->unalign_reg_stride);
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} else {
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reg_addr = reg_base +
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(desc->unalign_reg_idx * desc->unalign_reg_stride);
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reg_addr += (idx - desc->unalign_reg_idx) * desc->reg_stride;
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}
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return reg_addr;
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}
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void virq_chip_generic_handler(int pirq, void *pdata)
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{
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struct virq_chip *chip;
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struct virq_desc *desc;
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struct virq_data *vdata;
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struct udevice *parent;
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uint status_reg;
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void *data;
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int irq;
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int ret;
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int i;
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desc = find_virq_desc_by_pirq(pirq);
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if (!desc)
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return;
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chip = desc->chip;
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vdata = desc->virqs;
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parent = (struct udevice *)pdata;
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if (!chip || !vdata || !parent)
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return;
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/* Read all status register */
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for (i = 0; i < chip->num_regs; i++) {
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status_reg = reg_base_get(desc, chip->status_base, i);
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desc->status_buf[i] = chip->read(parent, status_reg);
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if (desc->status_buf[i] < 0) {
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printf("%s: Read status register 0x%x failed, ret=%d\n",
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__func__, status_reg, desc->status_buf[i]);
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}
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}
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/* Handle all virq handler */
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for (i = 0; i < chip->num_irqs; i++) {
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if (desc->status_buf[chip->irqs[i].reg_offset] &
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chip->irqs[i].mask) {
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irq = vdata[i].irq;
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data = vdata[i].data;
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if (vdata[i].handle_irq) {
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vdata[i].count++;
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vdata[i].handle_irq(irq, data);
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}
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}
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}
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/* Clear all status register */
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for (i = 0; i < chip->num_regs; i++) {
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status_reg = reg_base_get(desc, chip->status_base, i);
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ret = chip->write(parent, status_reg, ~0U);
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if (ret)
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printf("%s: Clear status register 0x%x failed, ret=%d\n",
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__func__, status_reg, ret);
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}
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}
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int virq_add_chip(struct udevice *dev, struct virq_chip *chip, int irq)
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{
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struct virq_data *vdata;
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struct virq_desc *desc;
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uint *status_buf;
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uint status_reg;
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uint mask_reg;
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int ret;
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int i;
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if (irq < 0)
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return -EINVAL;
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desc = (struct virq_desc *)malloc(sizeof(*desc));
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if (!desc)
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return -ENOMEM;
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vdata = (struct virq_data *)calloc(sizeof(*vdata), chip->num_irqs);
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if (!vdata) {
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ret = -ENOMEM;
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goto free1;
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}
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status_buf = (uint *)calloc(sizeof(*status_buf), chip->num_irqs);
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if (!status_buf) {
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ret = -ENOMEM;
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goto free2;
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}
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for (i = 0; i < chip->num_irqs; i++)
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vdata[i].irq = virq_id_alloc();
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desc->parent = dev;
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desc->pirq = irq;
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desc->chip = chip;
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desc->virqs = vdata;
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desc->use_count = 0;
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desc->irq_base = vdata[0].irq;
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desc->irq_end = vdata[chip->num_irqs - 1].irq;
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desc->status_buf = status_buf;
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desc->reg_stride = chip->irq_reg_stride ? : 1;
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desc->unalign_reg_stride = chip->irq_unalign_reg_stride ? : 1;
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desc->unalign_reg_idx = chip->irq_unalign_reg_stride ?
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chip->irq_unalign_reg_idx : 0;
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list_add_tail(&desc->node, &virq_desc_head);
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/* Mask all register */
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for (i = 0; i < chip->num_regs; i++) {
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mask_reg = reg_base_get(desc, chip->mask_base, i);
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ret = chip->write(dev, mask_reg, ~0U);
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if (ret)
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printf("%s: Set mask register 0x%x failed, ret=%d\n",
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__func__, mask_reg, ret);
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}
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/* Clear all status */
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for (i = 0; i < chip->num_regs; i++) {
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status_reg = reg_base_get(desc, chip->status_base, i);
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ret = chip->write(dev, status_reg, ~0U);
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if (ret)
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printf("%s: Clear status register 0x%x failed, ret=%d\n",
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__func__, status_reg, ret);
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}
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/* Add parent irq into interrupt framework with generic virq handler */
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irq_install_handler(irq, virq_chip_generic_handler, dev);
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return irq_handler_disable(irq);
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free1:
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free(desc);
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free2:
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free(status_buf);
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return ret;
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}
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static int virq_init(void)
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{
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INIT_LIST_HEAD(&virq_desc_head);
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return 0;
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}
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static int __virq_enable(int irq, int enable)
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{
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struct virq_chip *chip;
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struct virq_desc *desc;
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uint mask_reg, mask_val;
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uint reg_val;
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int virq;
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int ret;
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desc = find_virq_desc(irq);
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if (!desc) {
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printf("%s: %s Invalid irq %d\n",
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__func__, enable ? "Enable" : "Disable", irq);
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return -ENOENT;
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}
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chip = desc->chip;
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if (!chip)
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return -ENOENT;
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virq = irq - desc->irq_base;
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mask_val = chip->irqs[virq].mask;
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mask_reg = reg_base_get(desc, chip->mask_base,
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chip->irqs[virq].reg_offset);
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reg_val = chip->read(desc->parent, mask_reg);
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if (enable)
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reg_val &= ~mask_val;
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else
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reg_val |= mask_val;
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ret = chip->write(desc->parent, mask_reg, reg_val);
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if (ret) {
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printf("%s: Clear status register 0x%x failed, ret=%d\n",
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__func__, mask_reg, ret);
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return ret;
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}
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if (enable)
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desc->virqs[virq].flag |= IRQ_FLG_ENABLE;
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else
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desc->virqs[virq].flag &= ~IRQ_FLG_ENABLE;
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return 0;
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}
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static int virq_enable(int irq)
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{
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struct virq_desc *desc = find_virq_desc(irq);
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int ret;
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if (bad_virq(irq))
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return -EINVAL;
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ret = __virq_enable(irq, 1);
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if (!ret) {
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if (desc->use_count == 0)
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irq_handler_enable(desc->pirq);
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desc->use_count++;
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}
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return ret;
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}
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static int virq_disable(int irq)
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{
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struct virq_desc *desc = find_virq_desc(irq);
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int ret;
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if (bad_virq(irq))
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return -EINVAL;
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ret = __virq_enable(irq, 0);
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if (!ret) {
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if (desc->use_count <= 0)
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return ret;
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if (desc->use_count == 1)
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irq_handler_disable(desc->pirq);
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desc->use_count--;
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}
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return ret;
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}
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struct irq_chip virq_generic_chip = {
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.name = "virq-irq-chip",
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.irq_init = virq_init,
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.irq_enable = virq_enable,
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.irq_disable = virq_disable,
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};
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struct irq_chip *arch_virq_get_irqchip(void)
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{
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return &virq_generic_chip;
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}
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