/*
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* Copyright (c) 2015-2016, NVIDIA CORPORATION.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
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#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
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#define TEGRA186_POWER_DOMAIN_AUD 0
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#define TEGRA186_POWER_DOMAIN_DFD 1
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#define TEGRA186_POWER_DOMAIN_DISP 2
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#define TEGRA186_POWER_DOMAIN_DISPB 3
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#define TEGRA186_POWER_DOMAIN_DISPC 4
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#define TEGRA186_POWER_DOMAIN_ISPA 5
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#define TEGRA186_POWER_DOMAIN_NVDEC 6
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#define TEGRA186_POWER_DOMAIN_NVJPG 7
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#define TEGRA186_POWER_DOMAIN_MPE 8
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#define TEGRA186_POWER_DOMAIN_PCX 9
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#define TEGRA186_POWER_DOMAIN_SAX 10
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#define TEGRA186_POWER_DOMAIN_VE 11
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#define TEGRA186_POWER_DOMAIN_VIC 12
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#define TEGRA186_POWER_DOMAIN_XUSBA 13
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#define TEGRA186_POWER_DOMAIN_XUSBB 14
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#define TEGRA186_POWER_DOMAIN_XUSBC 15
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#define TEGRA186_POWER_DOMAIN_GPU 43
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#define TEGRA186_POWER_DOMAIN_MAX 44
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#endif
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