// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2018 Rockchip Electronics Co., Ltd
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*/
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#include <clk.h>
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <sound.h>
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#include "rockchip-i2s.h"
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#define I2S_FIFO_LENGTH (31)
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struct rk_i2s_dev {
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void *regbase;
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struct clk mclk;
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};
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static inline u32 i2s_reg_readl(struct rk_i2s_dev *dev, u32 offset)
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{
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return readl(dev->regbase + offset);
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}
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static inline void i2s_reg_writel(struct rk_i2s_dev *dev, u32 offset, u32 val)
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{
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writel(val, dev->regbase + offset);
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}
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static inline void i2s_reg_update_bits(struct rk_i2s_dev *dev, u32 offset,
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u32 mask, u32 val)
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{
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u32 tmp, orig;
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orig = readl(dev->regbase + offset);
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tmp = orig & ~mask;
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tmp |= val & mask;
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if (tmp != orig)
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writel(tmp, dev->regbase + offset);
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}
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static void dump_regs(struct rk_i2s_dev *dev)
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{
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int i = 0;
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for (i = 0; i <= I2S_RXDR; i += 4)
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debug("0x%02x: 0x%08x\n", i, readl(dev->regbase + i));
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}
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static int rk_i2s_hw_params(struct udevice *udev, unsigned int samplerate,
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unsigned int fmt, unsigned int channels)
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{
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struct rk_i2s_dev *dev = dev_get_priv(udev);
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/* set fmt */
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i2s_reg_update_bits(dev, I2S_CKR,
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I2S_CKR_MSS_MASK, I2S_CKR_MSS_MASTER);
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i2s_reg_update_bits(dev, I2S_TXCR,
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I2S_TXCR_IBM_MASK, I2S_TXCR_IBM_NORMAL);
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i2s_reg_update_bits(dev, I2S_RXCR,
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I2S_RXCR_IBM_MASK, I2S_RXCR_IBM_NORMAL);
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/* set div */
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i2s_reg_update_bits(dev, I2S_CKR,
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I2S_CKR_TSD_MASK | I2S_CKR_RSD_MASK,
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I2S_CKR_TSD(64) | I2S_CKR_RSD(64));
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i2s_reg_update_bits(dev, I2S_CKR,
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I2S_CKR_MDIV_MASK, I2S_CKR_MDIV(4));
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/* set hwparams */
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i2s_reg_update_bits(dev, I2S_TXCR,
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I2S_TXCR_VDW_MASK |
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I2S_TXCR_CSR_MASK,
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I2S_TXCR_VDW(16) |
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I2S_TXCR_CHN_2);
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i2s_reg_update_bits(dev, I2S_RXCR,
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I2S_RXCR_CSR_MASK |
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I2S_RXCR_VDW_MASK,
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I2S_TXCR_VDW(16) |
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I2S_TXCR_CHN_2);
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i2s_reg_update_bits(dev, I2S_DMACR,
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I2S_DMACR_TDL_MASK | I2S_DMACR_RDL_MASK,
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I2S_DMACR_TDL(16) | I2S_DMACR_RDL(16));
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return 0;
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}
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static void rk_i2s_txctrl(struct rk_i2s_dev *dev, int on)
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{
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if (on) {
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i2s_reg_update_bits(dev, I2S_XFER,
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I2S_XFER_TXS_MASK | I2S_XFER_RXS_MASK,
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I2S_XFER_TXS_START | I2S_XFER_RXS_START);
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} else {
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i2s_reg_update_bits(dev, I2S_XFER,
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I2S_XFER_TXS_MASK |
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I2S_XFER_RXS_MASK,
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I2S_XFER_TXS_STOP |
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I2S_XFER_RXS_STOP);
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i2s_reg_update_bits(dev, I2S_CLR,
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I2S_CLR_TXC_MASK | I2S_CLR_RXC_MASK,
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I2S_CLR_TXC | I2S_CLR_RXC);
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}
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}
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static int rk_i2s_transfer_tx_data(struct udevice *udev, unsigned int *data,
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unsigned long data_size)
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{
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struct rk_i2s_dev *dev = dev_get_priv(udev);
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u32 val;
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if (data_size < I2S_FIFO_LENGTH) {
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debug("%s : invalid data size\n", __func__);
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return -EINVAL;
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}
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rk_i2s_txctrl(dev, 1);
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while (data_size > 0) {
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val = i2s_reg_readl(dev, I2S_FIFOLR);
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if (val < I2S_FIFO_LENGTH) {
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i2s_reg_writel(dev, I2S_TXDR, *data++);
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data_size--;
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}
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}
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return 0;
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}
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static int rk_i2s_set_sysclk(struct udevice *dev, unsigned int freq)
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{
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struct rk_i2s_dev *i2s = dev_get_priv(dev);
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clk_set_rate(&i2s->mclk, freq);
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return 0;
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}
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static const struct snd_soc_dai_ops rockchip_i2s_ops = {
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.hw_params = rk_i2s_hw_params,
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.set_sysclk = rk_i2s_set_sysclk,
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.transfer = rk_i2s_transfer_tx_data,
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};
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static int rockchip_i2s_probe(struct udevice *dev)
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{
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struct rk_i2s_dev *i2s = dev_get_priv(dev);
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int ret;
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i2s->regbase = dev_read_addr_ptr(dev);
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ret = clk_get_by_name(dev, "i2s_clk", &i2s->mclk);
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if (ret) {
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printf("%s get i2s mclk fail!\n", __func__);
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return -EINVAL;
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}
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dump_regs(i2s);
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return 0;
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}
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static const struct udevice_id rockchip_i2s_ids[] = {
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{ .compatible = "rockchip,px30-i2s", },
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{ .compatible = "rockchip,rk3036-i2s", },
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{ .compatible = "rockchip,rk3066-i2s", },
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{ .compatible = "rockchip,rk3128-i2s", },
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{ .compatible = "rockchip,rk3188-i2s", },
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{ .compatible = "rockchip,rk3288-i2s", },
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{ .compatible = "rockchip,rk3328-i2s", },
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{ .compatible = "rockchip,rk3368-i2s", },
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{ .compatible = "rockchip,rk3399-i2s", },
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{ }
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};
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U_BOOT_DRIVER(rockchip_i2s) = {
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.name = "rockchip_i2s",
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.id = UCLASS_I2S,
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.of_match = rockchip_i2s_ids,
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.probe = rockchip_i2s_probe,
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.priv_auto_alloc_size = sizeof(struct rk_i2s_dev),
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.ops = &rockchip_i2s_ops,
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};
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UCLASS_DRIVER(i2s) = {
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.id = UCLASS_I2S,
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.name = "i2s_bus",
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};
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