// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2022 Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/pinctrl.h>
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#include <errno.h>
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#include <i2c.h>
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#include <max96745.h>
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struct function_desc {
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const char *name;
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const char **group_names;
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int num_group_names;
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u8 gpio_out_dis:1;
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u8 gpio_io_rx_en:1;
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u8 gpio_tx_en_a:1;
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u8 gpio_tx_en_b:1;
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u8 gpio_rx_en_a:1;
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u8 gpio_rx_en_b:1;
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u8 gpio_tx_id;
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u8 gpio_rx_id;
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};
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struct group_desc {
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const char *name;
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int *pins;
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int num_pins;
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void *data;
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};
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struct pin_desc {
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unsigned number;
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const char *name;
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};
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static const struct pin_desc max96745_pins[] = {
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{0, "gpio0"},
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{1, "gpio1"},
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{2, "gpio2"},
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{3, "gpio3"},
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{4, "gpio4"},
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{5, "gpio5"},
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{6, "gpio6"},
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{7, "gpio7"},
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{8, "gpio8"},
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{9, "gpio9"},
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{10, "gpio10"},
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{11, "gpio11"},
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{12, "gpio12"},
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{13, "gpio13"},
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{14, "gpio14"},
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{15, "gpio15"},
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{16, "gpio16"},
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{17, "gpio17"},
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{18, "gpio18"},
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{19, "gpio19"},
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{20, "gpio20"},
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{21, "gpio21"},
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{22, "gpio22"},
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{23, "gpio23"},
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{24, "gpio24"},
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{25, "gpio25"},
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};
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static int gpio0_pins[] = {0};
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static int gpio1_pins[] = {1};
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static int gpio2_pins[] = {2};
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static int gpio3_pins[] = {3};
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static int gpio4_pins[] = {4};
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static int gpio5_pins[] = {5};
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static int gpio6_pins[] = {6};
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static int gpio7_pins[] = {7};
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static int gpio8_pins[] = {8};
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static int gpio9_pins[] = {9};
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static int gpio10_pins[] = {10};
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static int gpio11_pins[] = {11};
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static int gpio12_pins[] = {12};
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static int gpio13_pins[] = {13};
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static int gpio14_pins[] = {14};
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static int gpio15_pins[] = {15};
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static int gpio16_pins[] = {16};
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static int gpio17_pins[] = {17};
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static int gpio18_pins[] = {18};
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static int gpio19_pins[] = {19};
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static int gpio20_pins[] = {20};
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static int gpio21_pins[] = {21};
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static int gpio22_pins[] = {22};
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static int gpio23_pins[] = {23};
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static int gpio24_pins[] = {24};
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static int gpio25_pins[] = {25};
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#define GROUP_DESC(nm) \
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{ \
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.name = #nm, \
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.pins = nm ## _pins, \
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.num_pins = ARRAY_SIZE(nm ## _pins), \
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}
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static const struct group_desc max96745_groups[] = {
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GROUP_DESC(gpio0),
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GROUP_DESC(gpio1),
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GROUP_DESC(gpio2),
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GROUP_DESC(gpio3),
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GROUP_DESC(gpio4),
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GROUP_DESC(gpio5),
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GROUP_DESC(gpio6),
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GROUP_DESC(gpio7),
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GROUP_DESC(gpio8),
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GROUP_DESC(gpio9),
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GROUP_DESC(gpio10),
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GROUP_DESC(gpio11),
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GROUP_DESC(gpio12),
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GROUP_DESC(gpio13),
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GROUP_DESC(gpio14),
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GROUP_DESC(gpio15),
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GROUP_DESC(gpio16),
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GROUP_DESC(gpio17),
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GROUP_DESC(gpio18),
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GROUP_DESC(gpio19),
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GROUP_DESC(gpio20),
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GROUP_DESC(gpio21),
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GROUP_DESC(gpio22),
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GROUP_DESC(gpio23),
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GROUP_DESC(gpio24),
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GROUP_DESC(gpio25),
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};
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static const char *gpio_groups[] = {
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"gpio0", "gpio1", "gpio2", "gpio3", "gpio4",
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"gpio5", "gpio6", "gpio7", "gpio8", "gpio9",
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"gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
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"gpio15", "gpio16", "gpio17", "gpio18", "gpio19",
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"gpio20", "gpio21", "gpio22", "gpio23", "gpio24",
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"gpio25",
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};
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#define FUNCTION_DESC_GPIO_TX_A(id) \
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{ \
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.name = "GPIO_TX_A_"#id, \
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.group_names = gpio_groups, \
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.num_group_names = ARRAY_SIZE(gpio_groups), \
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.gpio_out_dis = 1, \
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.gpio_tx_en_a = 1, \
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.gpio_io_rx_en = 1, \
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.gpio_tx_id = id, \
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} \
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#define FUNCTION_DESC_GPIO_TX_B(id) \
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{ \
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.name = "GPIO_TX_B_"#id, \
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.group_names = gpio_groups, \
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.num_group_names = ARRAY_SIZE(gpio_groups), \
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.gpio_out_dis = 1, \
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.gpio_tx_en_b = 1, \
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.gpio_io_rx_en = 1, \
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.gpio_tx_id = id, \
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} \
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#define FUNCTION_DESC_GPIO_RX_A(id) \
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{ \
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.name = "GPIO_RX_A_"#id, \
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.group_names = gpio_groups, \
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.num_group_names = ARRAY_SIZE(gpio_groups), \
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.gpio_rx_en_a = 1, \
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.gpio_rx_id = id, \
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} \
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#define FUNCTION_DESC_GPIO_RX_B(id) \
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{ \
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.name = "GPIO_RX_B_"#id, \
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.group_names = gpio_groups, \
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.num_group_names = ARRAY_SIZE(gpio_groups), \
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.gpio_rx_en_b = 1, \
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.gpio_rx_id = id, \
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} \
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#define FUNCTION_DESC_GPIO() \
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{ \
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.name = "GPIO", \
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.group_names = gpio_groups, \
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.num_group_names = ARRAY_SIZE(gpio_groups), \
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} \
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static const struct function_desc max96745_functions[] = {
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FUNCTION_DESC_GPIO_TX_A(0),
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FUNCTION_DESC_GPIO_TX_A(1),
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FUNCTION_DESC_GPIO_TX_A(2),
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FUNCTION_DESC_GPIO_TX_A(3),
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FUNCTION_DESC_GPIO_TX_A(4),
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FUNCTION_DESC_GPIO_TX_A(5),
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FUNCTION_DESC_GPIO_TX_A(6),
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FUNCTION_DESC_GPIO_TX_A(7),
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FUNCTION_DESC_GPIO_TX_A(8),
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FUNCTION_DESC_GPIO_TX_A(9),
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FUNCTION_DESC_GPIO_TX_A(10),
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FUNCTION_DESC_GPIO_TX_A(11),
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FUNCTION_DESC_GPIO_TX_A(12),
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FUNCTION_DESC_GPIO_TX_A(13),
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FUNCTION_DESC_GPIO_TX_A(14),
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FUNCTION_DESC_GPIO_TX_A(15),
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FUNCTION_DESC_GPIO_TX_A(16),
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FUNCTION_DESC_GPIO_TX_A(17),
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FUNCTION_DESC_GPIO_TX_A(18),
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FUNCTION_DESC_GPIO_TX_A(19),
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FUNCTION_DESC_GPIO_TX_A(20),
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FUNCTION_DESC_GPIO_TX_A(21),
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FUNCTION_DESC_GPIO_TX_A(22),
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FUNCTION_DESC_GPIO_TX_A(23),
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FUNCTION_DESC_GPIO_TX_A(24),
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FUNCTION_DESC_GPIO_TX_A(25),
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FUNCTION_DESC_GPIO_TX_A(26),
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FUNCTION_DESC_GPIO_TX_A(27),
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FUNCTION_DESC_GPIO_TX_A(28),
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FUNCTION_DESC_GPIO_TX_A(29),
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FUNCTION_DESC_GPIO_TX_A(30),
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FUNCTION_DESC_GPIO_TX_A(31),
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FUNCTION_DESC_GPIO_TX_B(0),
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FUNCTION_DESC_GPIO_TX_B(1),
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FUNCTION_DESC_GPIO_TX_B(2),
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FUNCTION_DESC_GPIO_TX_B(3),
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FUNCTION_DESC_GPIO_TX_B(4),
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FUNCTION_DESC_GPIO_TX_B(5),
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FUNCTION_DESC_GPIO_TX_B(6),
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FUNCTION_DESC_GPIO_TX_B(7),
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FUNCTION_DESC_GPIO_TX_B(8),
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FUNCTION_DESC_GPIO_TX_B(9),
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FUNCTION_DESC_GPIO_TX_B(10),
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FUNCTION_DESC_GPIO_TX_B(11),
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FUNCTION_DESC_GPIO_TX_B(12),
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FUNCTION_DESC_GPIO_TX_B(13),
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FUNCTION_DESC_GPIO_TX_B(14),
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FUNCTION_DESC_GPIO_TX_B(15),
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FUNCTION_DESC_GPIO_TX_B(16),
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FUNCTION_DESC_GPIO_TX_B(17),
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FUNCTION_DESC_GPIO_TX_B(18),
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FUNCTION_DESC_GPIO_TX_B(19),
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FUNCTION_DESC_GPIO_TX_B(20),
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FUNCTION_DESC_GPIO_TX_B(21),
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FUNCTION_DESC_GPIO_TX_B(22),
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FUNCTION_DESC_GPIO_TX_B(23),
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FUNCTION_DESC_GPIO_TX_B(24),
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FUNCTION_DESC_GPIO_TX_B(25),
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FUNCTION_DESC_GPIO_TX_B(26),
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FUNCTION_DESC_GPIO_TX_B(27),
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FUNCTION_DESC_GPIO_TX_B(28),
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FUNCTION_DESC_GPIO_TX_B(29),
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FUNCTION_DESC_GPIO_TX_B(30),
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FUNCTION_DESC_GPIO_TX_B(31),
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FUNCTION_DESC_GPIO_RX_A(0),
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FUNCTION_DESC_GPIO_RX_A(1),
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FUNCTION_DESC_GPIO_RX_A(2),
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FUNCTION_DESC_GPIO_RX_A(3),
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FUNCTION_DESC_GPIO_RX_A(4),
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FUNCTION_DESC_GPIO_RX_A(5),
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FUNCTION_DESC_GPIO_RX_A(6),
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FUNCTION_DESC_GPIO_RX_A(7),
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FUNCTION_DESC_GPIO_RX_A(8),
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FUNCTION_DESC_GPIO_RX_A(9),
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FUNCTION_DESC_GPIO_RX_A(10),
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FUNCTION_DESC_GPIO_RX_A(11),
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FUNCTION_DESC_GPIO_RX_A(12),
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FUNCTION_DESC_GPIO_RX_A(13),
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FUNCTION_DESC_GPIO_RX_A(14),
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FUNCTION_DESC_GPIO_RX_A(15),
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FUNCTION_DESC_GPIO_RX_A(16),
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FUNCTION_DESC_GPIO_RX_A(17),
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FUNCTION_DESC_GPIO_RX_A(18),
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FUNCTION_DESC_GPIO_RX_A(19),
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FUNCTION_DESC_GPIO_RX_A(20),
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FUNCTION_DESC_GPIO_RX_A(21),
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FUNCTION_DESC_GPIO_RX_A(22),
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FUNCTION_DESC_GPIO_RX_A(23),
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FUNCTION_DESC_GPIO_RX_A(24),
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FUNCTION_DESC_GPIO_RX_A(25),
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FUNCTION_DESC_GPIO_RX_A(26),
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FUNCTION_DESC_GPIO_RX_A(27),
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FUNCTION_DESC_GPIO_RX_A(28),
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FUNCTION_DESC_GPIO_RX_A(29),
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FUNCTION_DESC_GPIO_RX_A(30),
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FUNCTION_DESC_GPIO_RX_A(31),
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FUNCTION_DESC_GPIO_RX_B(0),
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FUNCTION_DESC_GPIO_RX_B(1),
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FUNCTION_DESC_GPIO_RX_B(2),
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FUNCTION_DESC_GPIO_RX_B(3),
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FUNCTION_DESC_GPIO_RX_B(4),
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FUNCTION_DESC_GPIO_RX_B(5),
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FUNCTION_DESC_GPIO_RX_B(6),
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FUNCTION_DESC_GPIO_RX_B(7),
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FUNCTION_DESC_GPIO_RX_B(8),
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FUNCTION_DESC_GPIO_RX_B(9),
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FUNCTION_DESC_GPIO_RX_B(10),
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FUNCTION_DESC_GPIO_RX_B(11),
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FUNCTION_DESC_GPIO_RX_B(12),
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FUNCTION_DESC_GPIO_RX_B(13),
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FUNCTION_DESC_GPIO_RX_B(14),
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FUNCTION_DESC_GPIO_RX_B(15),
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FUNCTION_DESC_GPIO_RX_B(16),
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FUNCTION_DESC_GPIO_RX_B(17),
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FUNCTION_DESC_GPIO_RX_B(18),
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FUNCTION_DESC_GPIO_RX_B(19),
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FUNCTION_DESC_GPIO_RX_B(20),
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FUNCTION_DESC_GPIO_RX_B(21),
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FUNCTION_DESC_GPIO_RX_B(22),
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FUNCTION_DESC_GPIO_RX_B(23),
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FUNCTION_DESC_GPIO_RX_B(24),
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FUNCTION_DESC_GPIO_RX_B(25),
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FUNCTION_DESC_GPIO_RX_B(26),
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FUNCTION_DESC_GPIO_RX_B(27),
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FUNCTION_DESC_GPIO_RX_B(28),
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FUNCTION_DESC_GPIO_RX_B(29),
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FUNCTION_DESC_GPIO_RX_B(30),
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FUNCTION_DESC_GPIO_RX_B(31),
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FUNCTION_DESC_GPIO(),
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};
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static int max96745_get_pins_count(struct udevice *dev)
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{
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return ARRAY_SIZE(max96745_pins);
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}
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static const char *max96745_get_pin_name(struct udevice *dev, unsigned selector)
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{
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return max96745_pins[selector].name;
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}
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static int max96745_pinctrl_get_groups_count(struct udevice *dev)
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{
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return ARRAY_SIZE(max96745_groups);
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}
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static const char *max96745_pinctrl_get_group_name(struct udevice *dev,
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unsigned selector)
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{
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return max96745_groups[selector].name;
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}
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static int max96745_pinctrl_get_functions_count(struct udevice *dev)
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{
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return ARRAY_SIZE(max96745_functions);
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}
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static const char *max96745_pinctrl_get_function_name(struct udevice *dev,
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unsigned selector)
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{
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return max96745_functions[selector].name;
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}
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static int max96745_pinmux_set(struct udevice *dev, unsigned group_selector,
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unsigned func_selector)
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{
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const struct group_desc *grp = &max96745_groups[group_selector];
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const struct function_desc *func = &max96745_functions[func_selector];
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int i;
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for (i = 0; i < grp->num_pins; i++) {
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dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(grp->pins[i]),
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GPIO_OUT_DIS,
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FIELD_PREP(GPIO_OUT_DIS, func->gpio_out_dis));
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if (func->gpio_tx_en_a || func->gpio_tx_en_b)
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dm_i2c_reg_clrset(dev->parent, GPIO_B_REG(grp->pins[i]),
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GPIO_TX_ID,
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FIELD_PREP(GPIO_TX_ID, func->gpio_tx_id));
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if (func->gpio_rx_en_a || func->gpio_rx_en_b)
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dm_i2c_reg_clrset(dev->parent, GPIO_C_REG(grp->pins[i]),
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GPIO_RX_ID,
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FIELD_PREP(GPIO_RX_ID, func->gpio_rx_id));
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dm_i2c_reg_clrset(dev->parent, GPIO_D_REG(grp->pins[i]),
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GPIO_TX_EN_A | GPIO_TX_EN_B | GPIO_IO_RX_EN |
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GPIO_RX_EN_A | GPIO_RX_EN_B,
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FIELD_PREP(GPIO_TX_EN_A, func->gpio_tx_en_a) |
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FIELD_PREP(GPIO_TX_EN_B, func->gpio_tx_en_b) |
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FIELD_PREP(GPIO_RX_EN_A, func->gpio_rx_en_a) |
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FIELD_PREP(GPIO_RX_EN_B, func->gpio_rx_en_b) |
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FIELD_PREP(GPIO_IO_RX_EN, func->gpio_io_rx_en));
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}
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return 0;
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}
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static struct pinctrl_ops max96745_pinctrl_ops = {
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.get_pins_count = max96745_get_pins_count,
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.get_pin_name = max96745_get_pin_name,
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.get_groups_count = max96745_pinctrl_get_groups_count,
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.get_group_name = max96745_pinctrl_get_group_name,
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.get_functions_count = max96745_pinctrl_get_functions_count,
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.get_function_name = max96745_pinctrl_get_function_name,
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.set_state = pinctrl_generic_set_state,
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.pinmux_set = max96745_pinmux_set,
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.pinmux_group_set = max96745_pinmux_set,
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};
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static const struct udevice_id max96745_pinctrl_of_match[] = {
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{ .compatible = "maxim,max96745-pinctrl" },
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{ }
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};
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U_BOOT_DRIVER(max96745_pinctrl) = {
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.name = "pinctrl-max96745",
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.id = UCLASS_PINCTRL,
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.of_match = max96745_pinctrl_of_match,
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.ops = &max96745_pinctrl_ops,
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};
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