/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _DDR3_A38X_TOPOLOGY_H
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#define _DDR3_A38X_TOPOLOGY_H
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#include "ddr_topology_def.h"
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/* Bus mask variants */
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#define BUS_MASK_32BIT 0xf
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#define BUS_MASK_32BIT_ECC 0x1f
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#define BUS_MASK_16BIT 0x3
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#define BUS_MASK_16BIT_ECC 0x13
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#define BUS_MASK_16BIT_ECC_PUP3 0xb
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#define DYNAMIC_CS_SIZE_CONFIG
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#define DISABLE_L2_FILTERING_DURING_DDR_TRAINING
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#endif /* _DDR3_A38X_TOPOLOGY_H */
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