/*
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* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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/include/ "skeleton.dtsi"
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/include/ "serial.dtsi"
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/include/ "keyboard.dtsi"
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/include/ "rtc.dtsi"
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/include/ "tsc_timer.dtsi"
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/ {
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model = "Intel Cougar Canyon 2";
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compatible = "intel,cougarcanyon2", "intel,chiefriver";
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aliases {
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spi0 = &spi0;
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};
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config {
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silent_console = <0>;
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};
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chosen {
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stdout-path = "/serial";
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};
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microcode {
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update@0 {
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#include "microcode/m12306a2_00000008.dtsi"
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};
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update@1 {
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#include "microcode/m12306a4_00000007.dtsi"
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};
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update@2 {
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#include "microcode/m12306a5_00000007.dtsi"
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};
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update@3 {
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#include "microcode/m12306a8_00000010.dtsi"
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};
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update@4 {
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#include "microcode/m12306a9_0000001b.dtsi"
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};
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};
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fsp {
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compatible = "intel,ivybridge-fsp";
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fsp,enable-ht;
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};
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pci {
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#address-cells = <3>;
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#size-cells = <2>;
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compatible = "pci-x86";
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u-boot,dm-pre-reloc;
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ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
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0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
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0x01000000 0x0 0x2000 0x2000 0 0xe000>;
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pch@1f,0 {
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reg = <0x0000f800 0 0 0 0>;
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compatible = "intel,bd82x6x";
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u-boot,dm-pre-reloc;
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#address-cells = <1>;
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#size-cells = <1>;
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spi0: spi {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "intel,ich9-spi";
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spi-flash@0 {
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reg = <0>;
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compatible = "winbond,w25q64bv", "spi-flash";
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memory-map = <0xff800000 0x00800000>;
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};
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};
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gpioa {
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compatible = "intel,ich6-gpio";
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u-boot,dm-pre-reloc;
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reg = <0 0x10>;
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bank-name = "A";
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};
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gpiob {
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compatible = "intel,ich6-gpio";
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u-boot,dm-pre-reloc;
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reg = <0x30 0x10>;
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bank-name = "B";
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};
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gpioc {
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compatible = "intel,ich6-gpio";
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u-boot,dm-pre-reloc;
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reg = <0x40 0x10>;
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bank-name = "C";
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};
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};
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};
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};
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