/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_IA64_TLBFLUSH_H
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#define _ASM_IA64_TLBFLUSH_H
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/*
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* Copyright (C) 2002 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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#include <linux/mm.h>
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#include <asm/intrinsics.h>
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#include <asm/mmu_context.h>
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#include <asm/page.h>
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struct ia64_tr_entry {
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u64 ifa;
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u64 itir;
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u64 pte;
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u64 rr;
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}; /*Record for tr entry!*/
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extern int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size);
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extern void ia64_ptr_entry(u64 target_mask, int slot);
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extern struct ia64_tr_entry *ia64_idtrs[NR_CPUS];
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/*
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region register macros
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*/
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#define RR_TO_VE(val) (((val) >> 0) & 0x0000000000000001)
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#define RR_VE(val) (((val) & 0x0000000000000001) << 0)
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#define RR_VE_MASK 0x0000000000000001L
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#define RR_VE_SHIFT 0
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#define RR_TO_PS(val) (((val) >> 2) & 0x000000000000003f)
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#define RR_PS(val) (((val) & 0x000000000000003f) << 2)
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#define RR_PS_MASK 0x00000000000000fcL
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#define RR_PS_SHIFT 2
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#define RR_RID_MASK 0x00000000ffffff00L
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#define RR_TO_RID(val) ((val >> 8) & 0xffffff)
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/*
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* Now for some TLB flushing routines. This is the kind of stuff that
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* can be very expensive, so try to avoid them whenever possible.
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*/
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extern void setup_ptcg_sem(int max_purges, int from_palo);
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/*
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* Flush everything (kernel mapping may also have changed due to
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* vmalloc/vfree).
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*/
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extern void local_flush_tlb_all (void);
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#ifdef CONFIG_SMP
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extern void smp_flush_tlb_all (void);
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extern void smp_flush_tlb_mm (struct mm_struct *mm);
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extern void smp_flush_tlb_cpumask (cpumask_t xcpumask);
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# define flush_tlb_all() smp_flush_tlb_all()
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#else
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# define flush_tlb_all() local_flush_tlb_all()
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# define smp_flush_tlb_cpumask(m) local_flush_tlb_all()
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#endif
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static inline void
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local_finish_flush_tlb_mm (struct mm_struct *mm)
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{
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if (mm == current->active_mm)
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activate_context(mm);
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}
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/*
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* Flush a specified user mapping. This is called, e.g., as a result of fork() and
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* exit(). fork() ends up here because the copy-on-write mechanism needs to write-protect
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* the PTEs of the parent task.
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*/
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static inline void
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flush_tlb_mm (struct mm_struct *mm)
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{
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if (!mm)
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return;
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set_bit(mm->context, ia64_ctx.flushmap);
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mm->context = 0;
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if (atomic_read(&mm->mm_users) == 0)
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return; /* happens as a result of exit_mmap() */
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#ifdef CONFIG_SMP
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smp_flush_tlb_mm(mm);
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#else
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local_finish_flush_tlb_mm(mm);
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#endif
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}
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extern void flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long end);
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/*
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* Page-granular tlb flush.
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*/
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static inline void
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flush_tlb_page (struct vm_area_struct *vma, unsigned long addr)
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{
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#ifdef CONFIG_SMP
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flush_tlb_range(vma, (addr & PAGE_MASK), (addr & PAGE_MASK) + PAGE_SIZE);
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#else
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if (vma->vm_mm == current->active_mm)
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ia64_ptcl(addr, (PAGE_SHIFT << 2));
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else
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vma->vm_mm->context = 0;
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#endif
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}
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/*
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* Flush the local TLB. Invoked from another cpu using an IPI.
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*/
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#ifdef CONFIG_SMP
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void smp_local_flush_tlb(void);
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#else
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#define smp_local_flush_tlb()
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#endif
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static inline void flush_tlb_kernel_range(unsigned long start,
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unsigned long end)
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{
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flush_tlb_all(); /* XXX fix me */
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}
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#endif /* _ASM_IA64_TLBFLUSH_H */
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