/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#ifndef __ASM_CSKY_MMU_CONTEXT_H
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#define __ASM_CSKY_MMU_CONTEXT_H
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#include <asm-generic/mm_hooks.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <abi/ckmmu.h>
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#define TLBMISS_HANDLER_SETUP_PGD(pgd) \
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setup_pgd(__pa(pgd), false)
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#define TLBMISS_HANDLER_SETUP_PGD_KERNEL(pgd) \
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setup_pgd(__pa(pgd), true)
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#define ASID_MASK ((1 << CONFIG_CPU_ASID_BITS) - 1)
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#define cpu_asid(mm) (atomic64_read(&mm->context.asid) & ASID_MASK)
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#define init_new_context(tsk,mm) ({ atomic64_set(&(mm)->context.asid, 0); 0; })
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#define activate_mm(prev,next) switch_mm(prev, next, current)
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#define destroy_context(mm) do {} while (0)
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#define enter_lazy_tlb(mm, tsk) do {} while (0)
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#define deactivate_mm(tsk, mm) do {} while (0)
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void check_and_switch_context(struct mm_struct *mm, unsigned int cpu);
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static inline void
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switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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unsigned int cpu = smp_processor_id();
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if (prev != next)
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check_and_switch_context(next, cpu);
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TLBMISS_HANDLER_SETUP_PGD(next->pgd);
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write_mmu_entryhi(next->context.asid.counter);
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flush_icache_deferred(next);
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}
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#endif /* __ASM_CSKY_MMU_CONTEXT_H */
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