1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
| /*
| * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
| *
| */
|
| /dts-v1/;
|
| #include "rk3588-pcie-ep-demo.dtsi"
| #include "rk3588-linux.dtsi"
|
| / {
| model = "Rockchip RK3588 PCIE EP Demo V11 Board";
| compatible = "rockchip,rk3588-pcie-ep-demo-v11", "rockchip,rk3588";
| };
|
| &hdmi1_in_vp2 {
| status = "okay";
| };
|
| &route_hdmi1 {
| status = "okay";
| force-output;
| connect = <&vp2_out_hdmi1>;
|
| force_timing {
| clock-frequency = <65000000>;
| hactive = <1024>;
| vactive = <768>;
| hfront-porch = <24>;
| hsync-len = <136>;
| hback-porch = <160>;
| vfront-porch = <3>;
| vsync-len = <6>;
| vback-porch = <29>;
| hsync-active = <0>;
| vsync-active = <0>;
| de-active = <0>;
| pixelclk-active = <0>;
| };
|
| };
|
|