// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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* Copyright (c) 2023 Radxa Limited.
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*
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*/
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/dts-v1/;
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#include "rk3566-radxa-zero3.dtsi"
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/ {
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model = "Radxa ZERO 3";
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compatible ="radxa,zero3", "rockchip,rk3566";
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wireless_wlan: wireless-wlan {
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compatible = "wlan-platdata";
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wifi_chip_type = "ap6212";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_host_wake_irq>;
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WIFI,host_wake_irq = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
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};
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board_antenna: board-antenna {
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status = "okay";
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compatible = "regulator-fixed";
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enable-active-low;
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gpio = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>;
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regulator-always-on;
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regulator-boot-on;
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pinctrl-0 = <&ant_1>;
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pinctrl-names = "default";
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regulator-name = "board_antenna";
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};
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
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bluetooth {
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compatible = "brcm,bcm43438-bt";
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clocks = <&rk817 1>;
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clock-names = "lpo";
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device-wakeup-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
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host-wakeup-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
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shutdown-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
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max-speed = <1500000>;
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pinctrl-names = "default";
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pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
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vbat-supply = <&vcc3v3_sys>;
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vddio-supply = <&vcc_1v8>;
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};
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};
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&sdmmc1 {
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supports-sdio;
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bus-width = <4>;
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disable-wp;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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non-removable;
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rockchip,default-sample-phase = <180>;
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mmc-pwrseq = <&sdio_pwrseq>;
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non-removable;
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no-sd;
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no-mmc;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
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sd-uhs-sdr104;
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status = "okay";
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};
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&pinctrl {
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wifi {
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wifi_enable_h: wifi-enable-h {
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rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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wifi_host_wake_irq: wifi-host-wake-irq {
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rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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bt {
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bt_enable_h: bt-enable-h {
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rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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bt_host_wake_l: bt-host-wake-l {
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rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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bt_wake_l: bt-wake-l {
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rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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sdmmc1 {
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/omit-if-no-ref/
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sdmmc1_bus4: sdmmc1-bus4 {
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rockchip,pins =
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/* sdmmc1_d0 */
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<2 RK_PA3 1 &pcfg_pull_up_drv_level_12>,
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/* sdmmc1_d1 */
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<2 RK_PA4 1 &pcfg_pull_up_drv_level_12>,
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/* sdmmc1_d2 */
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<2 RK_PA5 1 &pcfg_pull_up_drv_level_12>,
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/* sdmmc1_d3 */
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<2 RK_PA6 1 &pcfg_pull_up_drv_level_12>;
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};
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/omit-if-no-ref/
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sdmmc1_clk: sdmmc1-clk {
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rockchip,pins =
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/* sdmmc1_clk */
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<2 RK_PB0 1 &pcfg_pull_up_drv_level_12>;
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};
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/omit-if-no-ref/
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sdmmc1_cmd: sdmmc1-cmd {
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rockchip,pins =
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/* sdmmc1_cmd */
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<2 RK_PA7 1 &pcfg_pull_up_drv_level_12>;
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};
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/omit-if-no-ref/
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sdmmc1_det: sdmmc1-det {
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rockchip,pins =
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/* sdmmc1_det */
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<2 RK_PB2 1 &pcfg_pull_up>;
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};
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/omit-if-no-ref/
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sdmmc1_pwren: sdmmc1-pwren {
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rockchip,pins =
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/* sdmmc1_pwren */
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<2 RK_PB1 1 &pcfg_pull_none>;
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};
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};
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antenna {
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ant_1: ant-1 {
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rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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};
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