// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
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*/
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/dts-v1/;
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#include "rk3326-863-lp3-v10.dtsi"
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/ {
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model = "Rockchip rk3326 863 rkisp1 board";
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compatible = "rockchip,rk3326-863-lp3-v10-rkisp1", "rockchip,rk3326";
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};
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&chosen {
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bootargs_ext = "androidboot.boot_devices=ff390000.dwmmc,ff3b0000.nandc";
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};
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&i2c2 {
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status = "okay";
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gc0312: gc0312@21 {
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status = "okay";
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compatible = "galaxycore,gc0312";
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reg = <0x21>;
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//pinctrl-names = "default";
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//pinctrl-0 = <&cif_clkout_m0>;
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clocks = <&cru SCLK_CIF_OUT>;
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clock-names = "xvclk";
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avdd-supply = <&vcc2v8_dvp>;
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dovdd-supply = <&vcc1v8_dvp>;
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dvdd-supply = <&vcc1v8_dvp>;
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pwdn-gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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rockchip,camera-module-name = "CameraKing";
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rockchip,camera-module-lens-name = "Largan";
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port {
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gc0312_out: endpoint {
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remote-endpoint = <&dvp_in_fcam>;
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};
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};
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};
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gc2145: gc2145@3c {
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status = "okay";
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compatible = "galaxycore,gc2145";
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reg = <0x3c>;
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//pinctrl-names = "default";
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//pinctrl-0 = <&cif_clkout_m0>;
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clocks = <&cru SCLK_CIF_OUT>;
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clock-names = "xvclk";
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avdd-supply = <&vcc2v8_dvp>;
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dovdd-supply = <&vcc1v8_dvp>;
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dvdd-supply = <&vcc1v8_dvp>;
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pwdn-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CameraKing";
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rockchip,camera-module-lens-name = "Largan";
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port {
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gc2145_out: endpoint {
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remote-endpoint = <&dvp_in_bcam>;
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};
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};
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};
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};
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&isp_mmu {
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status = "okay";
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};
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&rkisp1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&dvp_d0d1_m0 &dvp_d2d9_m0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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dvp_in_fcam: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&gc0312_out>;
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};
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dvp_in_bcam: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&gc2145_out>;
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};
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};
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};
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};
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