/*
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* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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*/
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/dts-v1/;
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#include "rk3308.dtsi"
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/ {
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model = "Rockchip RK3308 FPGA Platform";
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compatible = "rockchip,rk3308-fpga", "rockchip,rk3308";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff0b0000 console=ttyFIQ0 init=/init initrd=0x9000000,0x18bfc0";
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};
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memory@200000 {
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device_type = "memory";
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reg = <0x0 0x00200000 0x0 0x0FE00000>;
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};
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};
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&fiq_debugger {
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rockchip,serial-id = <1>;
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rockchip,irq-mode-enable = <1>;
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status = "ok";
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};
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&cpu1 {
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/delete-property/enable-method;
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};
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&cpu2 {
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/delete-property/enable-method;
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};
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&cpu3 {
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/delete-property/enable-method;
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};
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&emmc {
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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no-sdio;
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no-sd;
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non-removable;
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num-slots = <1>;
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status = "okay";
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};
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