// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
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/dts-v1/;
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#include "rk1808.dtsi"
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/ {
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model = "Rockchip rk1808 fpga board";
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compatible = "rockchip,fpga", "rockchip,rk1808";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff550000 console=ttyFIQ0 root=/dev/mmcblk1p8 rootfstype=ext4 rootwait clk_ignore_unused";
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};
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memory@200000 {
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device_type = "memory";
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reg = <0x0 0x00200000 0x0 0x0FE00000>;
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};
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fiq_debugger: fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
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status = "okay";
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};
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};
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&emmc {
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max-frequency = <400000>;
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clocks = <&xin24m>, <&xin24m>, <&xin24m>, <&xin24m>;
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clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
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mmc-hs200-1_8v;
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no-sdio;
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no-sd;
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num-slots = <1>;
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status = "okay";
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};
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&npu {
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status = "okay";
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};
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&sdmmc {
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max-frequency = <400000>;
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clocks = <&xin24m>, <&xin24m>, <&xin24m>, <&xin24m>;
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clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
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no-sdio;
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no-mmc;
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status = "okay";
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};
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/* If fiq_debugger set okay, need to define uart2 and to be disabled */
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&uart2 {
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status = "disabled";
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};
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