/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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metadata {
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title ="Enable YY3568 DSI0";
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compatible = "youyeetoo,yy3568";
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};
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fragment@0 {
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target-path = "/";
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__overlay__ {
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm4 0 25000 0>;
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brightness-levels = <
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0 20 20 21 21 22 22 23
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23 24 24 25 25 26 26 27
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27 28 28 29 29 30 30 31
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31 32 32 33 33 34 34 35
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35 36 36 37 37 38 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255
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>;
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default-brightness-level = <200>;
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enable-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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fragment@1 {
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target = <&pwm4>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@2 {
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target = <&dsi0>;
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__overlay__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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dsi0_panel: panel@0 {
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status = "okay";
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compatible = "simple-panel-dsi";
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reg = <0>;
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backlight = <&backlight>;
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enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
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reset-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
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reset-delay-ms = <60>;
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enable-delay-ms = <60>;
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prepare-delay-ms = <60>;
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unprepare-delay-ms = <60>;
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disable-delay-ms = <60>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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15 00 02 80 ac
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15 00 02 81 b8
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15 00 02 82 09
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15 00 02 83 78
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15 00 02 84 7f
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15 00 02 85 bb
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15 00 02 86 70
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];
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panel-exit-sequence = [
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05 00 01 28
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05 00 01 10
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];
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi0: endpoint {
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remote-endpoint = <&dsi0_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi0_out_panel: endpoint {
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remote-endpoint = <&panel_in_dsi0>;
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};
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};
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};
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};
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};
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fragment@3 {
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target = <&dsi0_in_vp1>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@4 {
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target = <&i2c1>;
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__overlay__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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gt9xx: gt9xx@5d {
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compatible = "goodix,gt9xx";
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reg = <0x5d>;
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touch-gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_RISING>;
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reset-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
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max-x = <1024>;
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max-y = <600>;
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tp-size = <911>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_gpio>;
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tp-supply = <&vcc_3v3>;
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status = "okay";
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};
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};
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};
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fragment@5 {
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target = <&video_phy0>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@6 {
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target = <&route_dsi0>;
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__overlay__ {
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status = "okay";
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connect = <&vp1_out_dsi0>;
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};
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};
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fragment@7 {
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target = <&dsi0_timing0>;
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__overlay__ {
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clock-frequency = <51668640>; //DCLK
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hactive = <1024>; //hactive
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vactive = <600>; //vactive
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hfront-porch = <160>; //hfp
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hback-porch = <160>; //hbp
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hsync-len = <10>; //hsa
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vfront-porch = <12>; //vfp
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vsync-len = <1>; //vsa
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vback-porch = <23>; //vbp
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hsync-active = <0>; //hync 极性控制 置 1 反转极性
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vsync-active = <0>; //vsync 极性控制 置 1 反转极性
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de-active = <1>; //DEN 极性控制
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pixelclk-active = <0>; //dclk 极性控制
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};
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};
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fragment@8 {
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target = <&disp_timings1>;
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__overlay__ {
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native-mode = <&dsi0_timing0>;
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};
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};
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fragment@9 {
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target = <&pinctrl>;
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__overlay__ {
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touch {
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touch_gpio: touch-gpio {
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rockchip,pins =
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<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
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<0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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};
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};
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