/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2014 Ulrich Hecht
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*/
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#ifndef __DT_BINDINGS_CLOCK_R8A7778_H__
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#define __DT_BINDINGS_CLOCK_R8A7778_H__
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/* CPG */
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#define R8A7778_CLK_PLLA 0
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#define R8A7778_CLK_PLLB 1
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#define R8A7778_CLK_B 2
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#define R8A7778_CLK_OUT 3
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#define R8A7778_CLK_P 4
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#define R8A7778_CLK_S 5
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#define R8A7778_CLK_S1 6
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/* MSTP0 */
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#define R8A7778_CLK_I2C0 30
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#define R8A7778_CLK_I2C1 29
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#define R8A7778_CLK_I2C2 28
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#define R8A7778_CLK_I2C3 27
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#define R8A7778_CLK_SCIF0 26
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#define R8A7778_CLK_SCIF1 25
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#define R8A7778_CLK_SCIF2 24
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#define R8A7778_CLK_SCIF3 23
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#define R8A7778_CLK_SCIF4 22
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#define R8A7778_CLK_SCIF5 21
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#define R8A7778_CLK_HSCIF0 19
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#define R8A7778_CLK_HSCIF1 18
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#define R8A7778_CLK_TMU0 16
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#define R8A7778_CLK_TMU1 15
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#define R8A7778_CLK_TMU2 14
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#define R8A7778_CLK_SSI0 12
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#define R8A7778_CLK_SSI1 11
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#define R8A7778_CLK_SSI2 10
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#define R8A7778_CLK_SSI3 9
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#define R8A7778_CLK_SRU 8
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#define R8A7778_CLK_HSPI 7
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/* MSTP1 */
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#define R8A7778_CLK_ETHER 14
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#define R8A7778_CLK_VIN0 10
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#define R8A7778_CLK_VIN1 9
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#define R8A7778_CLK_USB 0
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/* MSTP3 */
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#define R8A7778_CLK_MMC 31
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#define R8A7778_CLK_SDHI0 23
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#define R8A7778_CLK_SDHI1 22
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#define R8A7778_CLK_SDHI2 21
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#define R8A7778_CLK_SSI4 11
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#define R8A7778_CLK_SSI5 10
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#define R8A7778_CLK_SSI6 9
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#define R8A7778_CLK_SSI7 8
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#define R8A7778_CLK_SSI8 7
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/* MSTP5 */
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#define R8A7778_CLK_SRU_SRC0 31
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#define R8A7778_CLK_SRU_SRC1 30
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#define R8A7778_CLK_SRU_SRC2 29
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#define R8A7778_CLK_SRU_SRC3 28
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#define R8A7778_CLK_SRU_SRC4 27
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#define R8A7778_CLK_SRU_SRC5 26
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#define R8A7778_CLK_SRU_SRC6 25
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#define R8A7778_CLK_SRU_SRC7 24
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#define R8A7778_CLK_SRU_SRC8 23
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#endif /* __DT_BINDINGS_CLOCK_R8A7778_H__ */
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