/*
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* Copyright (c) 2017 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include <linux/mlx5/device.h>
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#include "accel/ipsec.h"
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#include "mlx5_core.h"
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#include "fpga/ipsec.h"
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u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev)
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{
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return mlx5_fpga_ipsec_device_caps(mdev);
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}
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EXPORT_SYMBOL_GPL(mlx5_accel_ipsec_device_caps);
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unsigned int mlx5_accel_ipsec_counters_count(struct mlx5_core_dev *mdev)
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{
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return mlx5_fpga_ipsec_counters_count(mdev);
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}
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int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
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unsigned int count)
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{
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return mlx5_fpga_ipsec_counters_read(mdev, counters, count);
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}
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void *mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
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struct mlx5_accel_esp_xfrm *xfrm,
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const __be32 saddr[4],
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const __be32 daddr[4],
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const __be32 spi, bool is_ipv6)
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{
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return mlx5_fpga_ipsec_create_sa_ctx(mdev, xfrm, saddr, daddr,
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spi, is_ipv6);
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}
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void mlx5_accel_esp_free_hw_context(void *context)
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{
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mlx5_fpga_ipsec_delete_sa_ctx(context);
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}
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int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev)
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{
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return mlx5_fpga_ipsec_init(mdev);
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}
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void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev)
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{
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mlx5_fpga_ipsec_cleanup(mdev);
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}
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struct mlx5_accel_esp_xfrm *
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mlx5_accel_esp_create_xfrm(struct mlx5_core_dev *mdev,
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const struct mlx5_accel_esp_xfrm_attrs *attrs,
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u32 flags)
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{
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struct mlx5_accel_esp_xfrm *xfrm;
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xfrm = mlx5_fpga_esp_create_xfrm(mdev, attrs, flags);
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if (IS_ERR(xfrm))
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return xfrm;
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xfrm->mdev = mdev;
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return xfrm;
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}
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EXPORT_SYMBOL_GPL(mlx5_accel_esp_create_xfrm);
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void mlx5_accel_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm)
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{
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mlx5_fpga_esp_destroy_xfrm(xfrm);
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}
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EXPORT_SYMBOL_GPL(mlx5_accel_esp_destroy_xfrm);
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int mlx5_accel_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
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const struct mlx5_accel_esp_xfrm_attrs *attrs)
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{
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return mlx5_fpga_esp_modify_xfrm(xfrm, attrs);
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}
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EXPORT_SYMBOL_GPL(mlx5_accel_esp_modify_xfrm);
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