/*************************************************************************/ /*!
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@Title Rogue hw definitions (kernel mode)
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@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
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@License Dual MIT/GPLv2
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The contents of this file are subject to the MIT license as set out below.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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Alternatively, the contents of this file may be used under the terms of
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the GNU General Public License Version 2 ("GPL") in which case the provisions
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of GPL are applicable instead of those above.
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If you wish to allow use of your version of this file only under the terms of
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GPL, and not to allow others to use your version of this file under the terms
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of the MIT license, indicate your decision by deleting the provisions above
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and replace them with the notice and other provisions required by GPL as set
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out in the file called "GPL-COPYING" included in this distribution. If you do
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not delete the provisions above, a recipient may use your version of this file
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under the terms of either the MIT license or GPL.
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This License is also included in this distribution in the file called
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"MIT-COPYING".
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EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
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PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/ /**************************************************************************/
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#ifndef _RGXDEFS_KM_H_
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#define _RGXDEFS_KM_H_
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#include RGX_BVNC_CORE_KM_HEADER
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#include RGX_BNC_CONFIG_KM_HEADER
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#define __IMG_EXPLICIT_INCLUDE_HWDEFS
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#if defined(__KERNEL__)
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#include "rgx_cr_defs_km.h"
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#else
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#include RGX_BVNC_CORE_HEADER
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#include RGX_BNC_CONFIG_HEADER
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#include "rgx_cr_defs.h"
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#endif
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#undef __IMG_EXPLICIT_INCLUDE_HWDEFS
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/* The following Macros are picked up through BVNC headers for PDUMP and
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* no hardware operations to be compatible with old build infrastructure.
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*/
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#if defined(PDUMP) || defined(NO_HARDWARE) || !defined(SUPPORT_MULTIBVNC_RUNTIME_BVNC_ACQUISITION)
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/******************************************************************************
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* Check for valid B.X.N.C
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*****************************************************************************/
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#if !defined(RGX_BVNC_KM_B) || !defined(RGX_BVNC_KM_V) || !defined(RGX_BVNC_KM_N) || !defined(RGX_BVNC_KM_C)
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#error "Need to specify BVNC (RGX_BVNC_KM_B, RGX_BVNC_KM_V, RGX_BVNC_KM_N and RGX_BVNC_C)"
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#endif
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#endif
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#if defined(PDUMP) || defined(NO_HARDWARE)
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/* Check core/config compatibility */
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#if (RGX_BVNC_KM_B != RGX_BNC_KM_B) || (RGX_BVNC_KM_N != RGX_BNC_KM_N) || (RGX_BVNC_KM_C != RGX_BNC_KM_C)
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#error "BVNC headers are mismatching (KM core/config)"
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#endif
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#endif
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/******************************************************************************
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* RGX Version name
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*****************************************************************************/
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#define _RGX_BVNC_ST2(S) #S
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#define _RGX_BVNC_ST(S) _RGX_BVNC_ST2(S)
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#if defined(PDUMP) || defined(NO_HARDWARE) || defined(PVRSRV_GPUVIRT_GUESTDRV) || !defined(SUPPORT_MULTIBVNC_RUNTIME_BVNC_ACQUISITION)
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#define RGX_BVNC_KM _RGX_BVNC_ST(RGX_BVNC_KM_B) "." _RGX_BVNC_ST(RGX_BVNC_KM_V) "." _RGX_BVNC_ST(RGX_BVNC_KM_N) "." _RGX_BVNC_ST(RGX_BVNC_KM_C)
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#endif
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#define RGX_BVNC_KM_V_ST _RGX_BVNC_ST(RGX_BVNC_KM_V)
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/******************************************************************************
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* RGX Defines
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*****************************************************************************/
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#define BVNC_FIELD_MASK ((1 << BVNC_FIELD_WIDTH) - 1)
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#define C_POSITION (0)
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#define N_POSITION ((C_POSITION) + (BVNC_FIELD_WIDTH))
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#define V_POSITION ((N_POSITION) + (BVNC_FIELD_WIDTH))
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#define B_POSITION ((V_POSITION) + (BVNC_FIELD_WIDTH))
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#define B_POSTION_MASK (((IMG_UINT64)(BVNC_FIELD_MASK) << (B_POSITION)))
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#define V_POSTION_MASK (((IMG_UINT64)(BVNC_FIELD_MASK) << (V_POSITION)))
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#define N_POSTION_MASK (((IMG_UINT64)(BVNC_FIELD_MASK) << (N_POSITION)))
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#define C_POSTION_MASK (((IMG_UINT64)(BVNC_FIELD_MASK) << (C_POSITION)))
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#define GET_B(x) (((x) & (B_POSTION_MASK)) >> (B_POSITION))
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#define GET_V(x) (((x) & (V_POSTION_MASK)) >> (V_POSITION))
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#define GET_N(x) (((x) & (N_POSTION_MASK)) >> (N_POSITION))
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#define GET_C(x) (((x) & (C_POSTION_MASK)) >> (C_POSITION))
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#define BVNC_PACK(B,V,N,C) ((((IMG_UINT64)B)) << (B_POSITION) | \
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(((IMG_UINT64)V)) << (V_POSITION) | \
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(((IMG_UINT64)N)) << (N_POSITION) | \
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(((IMG_UINT64)C)) << (C_POSITION) \
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)
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#define RGX_CR_CORE_ID_CONFIG_N_SHIFT (8U)
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#define RGX_CR_CORE_ID_CONFIG_C_SHIFT (0U)
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#define RGX_CR_CORE_ID_CONFIG_N_CLRMSK (0XFFFF00FFU)
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#define RGX_CR_CORE_ID_CONFIG_C_CLRMSK (0XFFFFFF00U)
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/* META cores (required for the RGX_FEATURE_META) */
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#define MTP218 (1)
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#define MTP219 (2)
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#define LTP218 (3)
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#define LTP217 (4)
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/* META Core memory feature depending on META variants */
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#define RGX_META_COREMEM_32K (32*1024)
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#define RGX_META_COREMEM_48K (48*1024)
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#define RGX_META_COREMEM_64K (64*1024)
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#define RGX_META_COREMEM_128K (128*1024)
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#define RGX_META_COREMEM_256K (256*1024)
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#if !defined(__KERNEL__)
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#if (!defined(SUPPORT_TRUSTED_DEVICE) || defined(RGX_FEATURE_META_DMA)) && (RGX_FEATURE_META_COREMEM_SIZE != 0)
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#define RGX_META_COREMEM_SIZE (RGX_FEATURE_META_COREMEM_SIZE*1024)
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#define RGX_META_COREMEM (1)
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#define RGX_META_COREMEM_CODE (1)
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#if !defined(FIX_HW_BRN_50767)
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#define RGX_META_COREMEM_DATA (1)
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#endif
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#else
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#undef SUPPORT_META_COREMEM
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#undef RGX_FEATURE_META_COREMEM_SIZE
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#undef RGX_FEATURE_META_DMA
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#define RGX_FEATURE_META_COREMEM_SIZE (0)
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#define RGX_META_COREMEM_SIZE (0)
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#endif
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#endif
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/* ISP requires valid state on all three pipes regardless of the number of
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* active pipes/tiles in flight.
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*/
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#define RGX_MAX_NUM_PIPES 3
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#define GET_ROGUE_CACHE_LINE_SIZE(x) ((x)/8)
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#define MAX_HW_TA3DCONTEXTS 2
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/* useful extra defines for clock ctrl*/
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#define RGX_CR_CLK_CTRL_ALL_ON (IMG_UINT64_C(0x5555555555555555)&RGX_CR_CLK_CTRL_MASKFULL)
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#define RGX_CR_CLK_CTRL_ALL_AUTO (IMG_UINT64_C(0xaaaaaaaaaaaaaaaa)&RGX_CR_CLK_CTRL_MASKFULL)
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#define RGX_CR_SOFT_RESET_DUST_n_CORE_EN (RGX_CR_SOFT_RESET_DUST_A_CORE_EN | \
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RGX_CR_SOFT_RESET_DUST_B_CORE_EN | \
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RGX_CR_SOFT_RESET_DUST_C_CORE_EN | \
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RGX_CR_SOFT_RESET_DUST_D_CORE_EN | \
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RGX_CR_SOFT_RESET_DUST_E_CORE_EN | \
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RGX_CR_SOFT_RESET_DUST_F_CORE_EN | \
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RGX_CR_SOFT_RESET_DUST_G_CORE_EN | \
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RGX_CR_SOFT_RESET_DUST_H_CORE_EN)
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/* SOFT_RESET Rascal and DUSTs bits */
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#define RGX_CR_SOFT_RESET_RASCALDUSTS_EN (RGX_CR_SOFT_RESET_RASCAL_CORE_EN | \
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RGX_CR_SOFT_RESET_DUST_n_CORE_EN)
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/* SOFT_RESET steps as defined in the TRM */
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#define RGX_S7_SOFT_RESET_DUSTS (RGX_CR_SOFT_RESET_DUST_n_CORE_EN)
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#define RGX_S7_SOFT_RESET_JONES (RGX_CR_SOFT_RESET_PM_EN | \
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RGX_CR_SOFT_RESET_VDM_EN | \
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RGX_CR_SOFT_RESET_ISP_EN)
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#define RGX_S7_SOFT_RESET_JONES_ALL (RGX_S7_SOFT_RESET_JONES | \
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RGX_CR_SOFT_RESET_BIF_EN | \
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RGX_CR_SOFT_RESET_SLC_EN | \
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RGX_CR_SOFT_RESET_GARTEN_EN)
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#define RGX_S7_SOFT_RESET2 (RGX_CR_SOFT_RESET2_BLACKPEARL_EN | \
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RGX_CR_SOFT_RESET2_PIXEL_EN | \
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RGX_CR_SOFT_RESET2_CDM_EN | \
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RGX_CR_SOFT_RESET2_VERTEX_EN)
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#define RGX_BIF_PM_PHYSICAL_PAGE_ALIGNSHIFT (12)
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#define RGX_BIF_PM_PHYSICAL_PAGE_SIZE (1 << RGX_BIF_PM_PHYSICAL_PAGE_ALIGNSHIFT)
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#define RGX_BIF_PM_VIRTUAL_PAGE_ALIGNSHIFT (14)
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#define RGX_BIF_PM_VIRTUAL_PAGE_SIZE (1 << RGX_BIF_PM_VIRTUAL_PAGE_ALIGNSHIFT)
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/* To get the number of required Dusts, divide the number of clusters by 2 and round up */
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#define RGX_REQ_NUM_DUSTS(CLUSTERS) ((CLUSTERS + 1) / 2)
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/* To get the number of required Bernado/Phantom, divide the number of clusters by 4 and round up */
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#define RGX_REQ_NUM_PHANTOMS(CLUSTERS) ((CLUSTERS + 3) / 4)
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#define RGX_REQ_NUM_BERNADOS(CLUSTERS) ((CLUSTERS + 3) / 4)
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#define RGX_REQ_NUM_BLACKPEARLS(CLUSTERS) ((CLUSTERS + 3) / 4)
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#if defined(SUPPORT_KERNEL_SRVINIT) && defined(__KERNEL__)
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#define RGX_GET_NUM_PHANTOMS(x) (RGX_REQ_NUM_PHANTOMS(x))
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#if defined(RGX_FEATURE_CLUSTER_GROUPING)
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#define RGX_NUM_PHANTOMS (RGX_REQ_NUM_PHANTOMS(RGX_FEATURE_NUM_CLUSTERS))
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#else
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#define RGX_NUM_PHANTOMS (1)
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#endif
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#else
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#if defined(RGX_FEATURE_CLUSTER_GROUPING)
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#define RGX_NUM_PHANTOMS (RGX_REQ_NUM_PHANTOMS(RGX_FEATURE_NUM_CLUSTERS))
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#else
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#define RGX_NUM_PHANTOMS (1)
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#endif
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#define RGX_GET_NUM_PHANTOMS(x) (RGX_REQ_NUM_PHANTOMS(RGX_FEATURE_NUM_CLUSTERS))
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#endif
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/* RGX_FEATURE_CDM_CONTROL_STREAM_FORMAT is not defined for format 1 cores (so define it now). */
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#if !defined(RGX_FEATURE_CDM_CONTROL_STREAM_FORMAT)
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#define RGX_FEATURE_CDM_CONTROL_STREAM_FORMAT (1)
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#endif
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/* META second thread feature depending on META variants and available CoreMem*/
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#if defined(RGX_FEATURE_META) && (RGX_FEATURE_META == MTP218 || RGX_FEATURE_META == MTP219) && defined(RGX_FEATURE_S7_TOP_INFRASTRUCTURE) && (RGX_FEATURE_META_COREMEM_SIZE == 256)
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#define RGXFW_META_SUPPORT_2ND_THREAD
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#endif
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/*
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Start at 903GiB. Size of 32MB per OSID (see rgxheapconfig.h)
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NOTE:
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The firmware heap base and size is defined here to
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simplify #include dependencies, see rgxheapconfig.h
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for the full RGX virtual address space layout.
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*/
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#define RGX_FIRMWARE_HEAP_BASE IMG_UINT64_C(0xE1C0000000)
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#define RGX_FIRMWARE_HEAP_SIZE (1<<RGX_FW_HEAP_SHIFT)
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#define RGX_FIRMWARE_HEAP_SHIFT RGX_FW_HEAP_SHIFT
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/* Default number of OSIDs is 1 unless GPU Virtualization is supported and enabled */
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#if defined(SUPPORT_PVRSRV_GPUVIRT) && !defined(PVRSRV_GPUVIRT_GUESTDRV) && (PVRSRV_GPUVIRT_NUM_OSID +1> 1)
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#define RGXFW_NUM_OS PVRSRV_GPUVIRT_NUM_OSID
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#else
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#define RGXFW_NUM_OS 1
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#endif
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/******************************************************************************
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* WA HWBRNs
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*****************************************************************************/
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#if defined(FIX_HW_BRN_36492)
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#undef RGX_CR_SOFT_RESET_SLC_EN
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#undef RGX_CR_SOFT_RESET_SLC_CLRMSK
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#undef RGX_CR_SOFT_RESET_SLC_SHIFT
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/* Remove the SOFT_RESET_SLC_EN bit from SOFT_RESET_MASKFULL */
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#undef RGX_CR_SOFT_RESET_MASKFULL
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#define RGX_CR_SOFT_RESET_MASKFULL IMG_UINT64_C(0x000001FFF7FFFC1D)
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#endif /* FIX_HW_BRN_36492 */
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#if defined(RGX_CR_JONES_IDLE_MASKFULL)
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/* Workaround for HW BRN 57289 */
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#if (RGX_CR_JONES_IDLE_MASKFULL != 0x0000000000007FFF)
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#error This WA must be updated if RGX_CR_JONES_IDLE is expanded!!!
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#endif
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#undef RGX_CR_JONES_IDLE_MASKFULL
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#undef RGX_CR_JONES_IDLE_TDM_SHIFT
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#undef RGX_CR_JONES_IDLE_TDM_CLRMSK
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#undef RGX_CR_JONES_IDLE_TDM_EN
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#define RGX_CR_JONES_IDLE_MASKFULL (IMG_UINT64_C(0x0000000000003FFF))
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#endif
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#define DPX_MAX_RAY_CONTEXTS 4 /* FIXME should this be in dpx file? */
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#define DPX_MAX_FBA_AP 16
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#define DPX_MAX_FBA_FILTER_WIDTH 24
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#if !defined(__KERNEL__)
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#if !defined(RGX_FEATURE_SLC_SIZE_IN_BYTES)
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#if defined(RGX_FEATURE_SLC_SIZE_IN_KILOBYTES)
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#define RGX_FEATURE_SLC_SIZE_IN_BYTES (RGX_FEATURE_SLC_SIZE_IN_KILOBYTES * 1024)
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#else
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#define RGX_FEATURE_SLC_SIZE_IN_BYTES (0)
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#endif
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#endif
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#endif
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#endif /* _RGXDEFS_KM_H_ */
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