/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <engine/falcon.h>
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#include <core/msgqueue.h>
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#include "priv.h"
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static void
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gm20b_pmu_recv(struct nvkm_pmu *pmu)
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{
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if (!pmu->queue) {
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nvkm_warn(&pmu->subdev,
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"recv function called while no firmware set!\n");
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return;
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}
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nvkm_msgqueue_recv(pmu->queue);
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}
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static const struct nvkm_pmu_func
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gm20b_pmu = {
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.enabled = gf100_pmu_enabled,
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.intr = gt215_pmu_intr,
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.recv = gm20b_pmu_recv,
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};
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int
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gm20b_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu)
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{
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int ret;
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ret = nvkm_pmu_new_(&gm20b_pmu, device, index, ppmu);
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if (ret)
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return ret;
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return 0;
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}
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