/*
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* Copyright 2013 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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/******************************************************************************
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* kernel data segment
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*****************************************************************************/
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#ifdef INCLUDE_PROC
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proc_kern:
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process(PROC_KERN, 0, 0)
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proc_list_head:
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#endif
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#ifdef INCLUDE_DATA
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proc_list_tail:
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time_prev: .b32 0
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time_next: .b32 0
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#endif
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/******************************************************************************
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* kernel code segment
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*****************************************************************************/
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#ifdef INCLUDE_CODE
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bra #init
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// read nv register
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//
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// $r15 - current
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// $r14 - addr
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// $r13 - data (return)
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// $r0 - zero
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rd32:
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nv_iowr(NV_PPWR_MMIO_ADDR, $r14)
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imm32($r13, NV_PPWR_MMIO_CTRL_OP_RD | NV_PPWR_MMIO_CTRL_TRIGGER)
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nv_iowr(NV_PPWR_MMIO_CTRL, $r13)
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rd32_wait:
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nv_iord($r13, NV_PPWR_MMIO_CTRL)
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and $r13 NV_PPWR_MMIO_CTRL_STATUS
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bra nz #rd32_wait
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nv_iord($r13, NV_PPWR_MMIO_DATA)
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ret
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// write nv register
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//
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// $r15 - current
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// $r14 - addr
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// $r13 - data
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// $r0 - zero
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wr32:
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nv_iowr(NV_PPWR_MMIO_ADDR, $r14)
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nv_iowr(NV_PPWR_MMIO_DATA, $r13)
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imm32($r13, NV_PPWR_MMIO_CTRL_OP_WR | NV_PPWR_MMIO_CTRL_MASK_B32_0 | NV_PPWR_MMIO_CTRL_TRIGGER)
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#ifdef NVKM_FALCON_MMIO_TRAP
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push $r13
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mov $r13 NV_PPWR_INTR_TRIGGER_USER1
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nv_iowr(NV_PPWR_INTR_TRIGGER, $r13)
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wr32_host:
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nv_iord($r13, NV_PPWR_INTR)
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and $r13 NV_PPWR_INTR_USER1
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bra nz #wr32_host
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pop $r13
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#endif
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nv_iowr(NV_PPWR_MMIO_CTRL, $r13)
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wr32_wait:
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nv_iord($r13, NV_PPWR_MMIO_CTRL)
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and $r13 NV_PPWR_MMIO_CTRL_STATUS
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bra nz #wr32_wait
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ret
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// busy-wait for a period of time
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//
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// $r15 - current
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// $r14 - ns
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// $r0 - zero
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nsec:
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push $r9
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push $r8
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nv_iord($r8, NV_PPWR_TIMER_LOW)
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nsec_loop:
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nv_iord($r9, NV_PPWR_TIMER_LOW)
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sub b32 $r9 $r8
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cmp b32 $r9 $r14
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bra l #nsec_loop
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pop $r8
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pop $r9
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ret
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// busy-wait for a period of time
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//
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// $r15 - current
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// $r14 - addr
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// $r13 - mask
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// $r12 - data
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// $r11 - timeout (ns)
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// $r0 - zero
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wait:
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push $r9
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push $r8
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nv_iord($r8, NV_PPWR_TIMER_LOW)
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wait_loop:
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nv_rd32($r10, $r14)
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and $r10 $r13
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cmp b32 $r10 $r12
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bra e #wait_done
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nv_iord($r9, NV_PPWR_TIMER_LOW)
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sub b32 $r9 $r8
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cmp b32 $r9 $r11
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bra l #wait_loop
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wait_done:
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pop $r8
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pop $r9
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ret
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// $r15 - current (kern)
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// $r14 - process
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// $r8 - NV_PPWR_INTR
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intr_watchdog:
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// read process' timer status, skip if not enabled
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ld b32 $r9 D[$r14 + #proc_time]
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cmp b32 $r9 0
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bra z #intr_watchdog_next_proc
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// subtract last timer's value from process' timer,
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// if it's <= 0 then the timer has expired
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ld b32 $r10 D[$r0 + #time_prev]
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sub b32 $r9 $r10
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bra g #intr_watchdog_next_time
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mov $r13 KMSG_ALARM
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call(send_proc)
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clear b32 $r9
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bra #intr_watchdog_next_proc
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// otherwise, update the next timer's value if this
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// process' timer is the soonest
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intr_watchdog_next_time:
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// ... or if there's no next timer yet
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ld b32 $r10 D[$r0 + #time_next]
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cmp b32 $r10 0
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bra z #intr_watchdog_next_time_set
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cmp b32 $r9 $r10
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bra g #intr_watchdog_next_proc
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intr_watchdog_next_time_set:
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st b32 D[$r0 + #time_next] $r9
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// update process' timer status, and advance
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intr_watchdog_next_proc:
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st b32 D[$r14 + #proc_time] $r9
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add b32 $r14 #proc_size
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cmp b32 $r14 #proc_list_tail
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bra ne #intr_watchdog
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ret
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intr:
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push $r0
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clear b32 $r0
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push $r8
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push $r9
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push $r10
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push $r11
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push $r12
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push $r13
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push $r14
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push $r15
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mov $r15 #proc_kern
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mov $r8 $flags
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push $r8
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nv_iord($r8, NV_PPWR_DSCRATCH(0))
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add b32 $r8 1
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nv_iowr(NV_PPWR_DSCRATCH(0), $r8)
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nv_iord($r8, NV_PPWR_INTR)
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and $r9 $r8 NV_PPWR_INTR_WATCHDOG
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bra z #intr_skip_watchdog
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st b32 D[$r0 + #time_next] $r0
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mov $r14 #proc_list_head
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call(intr_watchdog)
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ld b32 $r9 D[$r0 + #time_next]
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cmp b32 $r9 0
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bra z #intr_skip_watchdog
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nv_iowr(NV_PPWR_WATCHDOG_TIME, $r9)
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st b32 D[$r0 + #time_prev] $r9
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intr_skip_watchdog:
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and $r9 $r8 NV_PPWR_INTR_SUBINTR
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bra z #intr_skip_subintr
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nv_iord($r9, NV_PPWR_SUBINTR)
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and $r10 $r9 NV_PPWR_SUBINTR_FIFO
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bra z #intr_subintr_skip_fifo
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nv_iord($r12, NV_PPWR_FIFO_INTR)
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push $r12
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imm32($r14, PROC_HOST)
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mov $r13 KMSG_FIFO
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call(send)
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pop $r12
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nv_iowr(NV_PPWR_FIFO_INTR, $r12)
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intr_subintr_skip_fifo:
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nv_iowr(NV_PPWR_SUBINTR, $r9)
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intr_skip_subintr:
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mov $r9 (NV_PPWR_INTR_USER0 | NV_PPWR_INTR_USER1 | NV_PPWR_INTR_PAUSE)
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not b32 $r9
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and $r8 $r9
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nv_iowr(NV_PPWR_INTR_ACK, $r8)
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pop $r8
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mov $flags $r8
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pop $r15
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pop $r14
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pop $r13
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pop $r12
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pop $r11
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pop $r10
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pop $r9
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pop $r8
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pop $r0
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bclr $flags $p0
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iret
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// calculate the number of ticks in the specified nanoseconds delay
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//
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// $r15 - current
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// $r14 - ns
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// $r14 - ticks (return)
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// $r0 - zero
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ticks_from_ns:
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push $r12
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push $r11
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/* try not losing precision (multiply then divide) */
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imm32($r13, HW_TICKS_PER_US)
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call(mulu32_32_64)
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/* use an immeditate, it's ok because HW_TICKS_PER_US < 16 bits */
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div $r12 $r12 1000
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/* check if there wasn't any overflow */
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cmpu b32 $r11 0
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bra e #ticks_from_ns_quit
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/* let's divide then multiply, too bad for the precision! */
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div $r14 $r14 1000
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imm32($r13, HW_TICKS_PER_US)
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call(mulu32_32_64)
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/* this cannot overflow as long as HW_TICKS_PER_US < 1000 */
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ticks_from_ns_quit:
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mov b32 $r14 $r12
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pop $r11
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pop $r12
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ret
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// calculate the number of ticks in the specified microsecond delay
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//
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// $r15 - current
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// $r14 - us
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// $r14 - ticks (return)
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// $r0 - zero
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ticks_from_us:
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push $r12
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push $r11
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/* simply multiply $us by HW_TICKS_PER_US */
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imm32($r13, HW_TICKS_PER_US)
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call(mulu32_32_64)
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mov b32 $r14 $r12
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/* check if there wasn't any overflow */
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cmpu b32 $r11 0
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bra e #ticks_from_us_quit
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/* Overflow! */
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clear b32 $r14
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ticks_from_us_quit:
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pop $r11
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pop $r12
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ret
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// calculate the number of ticks in the specified microsecond delay
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//
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// $r15 - current
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// $r14 - ticks
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// $r14 - us (return)
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// $r0 - zero
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ticks_to_us:
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/* simply divide $ticks by HW_TICKS_PER_US */
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imm32($r13, HW_TICKS_PER_US)
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div $r14 $r14 $r13
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ret
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// request the current process be sent a message after a timeout expires
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//
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// $r15 - current
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// $r14 - ticks (make sure it is < 2^31 to avoid any possible overflow)
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// $r0 - zero
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timer:
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push $r9
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push $r8
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// interrupts off to prevent racing with timer isr
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bclr $flags ie0
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// if current process already has a timer set, bail
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ld b32 $r8 D[$r15 + #proc_time]
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cmp b32 $r8 0
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bra g #timer_done
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// halt watchdog timer temporarily
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clear b32 $r8
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nv_iowr(NV_PPWR_WATCHDOG_ENABLE, $r8)
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// find out how much time elapsed since the last update
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// of the watchdog and add this time to the wanted ticks
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nv_iord($r8, NV_PPWR_WATCHDOG_TIME)
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ld b32 $r9 D[$r0 + #time_prev]
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sub b32 $r9 $r8
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add b32 $r14 $r9
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st b32 D[$r15 + #proc_time] $r14
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// check for a pending interrupt. if there's one already
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// pending, we can just bail since the timer isr will
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// queue the next soonest right after it's done
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nv_iord($r8, NV_PPWR_INTR)
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and $r8 NV_PPWR_INTR_WATCHDOG
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bra nz #timer_enable
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// update the watchdog if this timer should expire first,
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// or if there's no timeout already set
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nv_iord($r8, NV_PPWR_WATCHDOG_TIME)
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cmp b32 $r14 $r0
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bra e #timer_reset
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cmp b32 $r14 $r8
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bra g #timer_enable
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timer_reset:
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nv_iowr(NV_PPWR_WATCHDOG_TIME, $r14)
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st b32 D[$r0 + #time_prev] $r14
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// re-enable the watchdog timer
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timer_enable:
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mov $r8 1
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nv_iowr(NV_PPWR_WATCHDOG_ENABLE, $r8)
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// interrupts back on
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timer_done:
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bset $flags ie0
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pop $r8
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pop $r9
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ret
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// send message to another process
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//
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// $r15 - current
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// $r14 - process
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// $r13 - message
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// $r12 - message data 0
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// $r11 - message data 1
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// $r0 - zero
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send_proc:
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push $r8
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push $r9
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// check for space in queue
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ld b32 $r8 D[$r14 + #proc_qget]
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ld b32 $r9 D[$r14 + #proc_qput]
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xor $r8 #proc_qmaskb
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cmp b32 $r8 $r9
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bra e #send_done
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// enqueue message
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and $r8 $r9 #proc_qmaskp
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shl b32 $r8 $r8 #proc_qlen
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add b32 $r8 #proc_queue
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add b32 $r8 $r14
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ld b32 $r10 D[$r15 + #proc_id]
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st b32 D[$r8 + #msg_process] $r10
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st b32 D[$r8 + #msg_message] $r13
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st b32 D[$r8 + #msg_data0] $r12
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st b32 D[$r8 + #msg_data1] $r11
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// increment PUT
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add b32 $r9 1
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and $r9 #proc_qmaskf
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st b32 D[$r14 + #proc_qput] $r9
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bset $flags $p2
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send_done:
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pop $r9
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pop $r8
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ret
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// lookup process structure by its name
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//
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// $r15 - current
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// $r14 - process name
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// $r0 - zero
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//
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// $r14 - process
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// $p1 - success
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find:
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push $r8
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mov $r8 #proc_list_head
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bset $flags $p1
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find_loop:
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ld b32 $r10 D[$r8 + #proc_id]
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cmp b32 $r10 $r14
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bra e #find_done
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add b32 $r8 #proc_size
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cmp b32 $r8 #proc_list_tail
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bra ne #find_loop
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bclr $flags $p1
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find_done:
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mov b32 $r14 $r8
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pop $r8
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ret
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// send message to another process
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//
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// $r15 - current
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// $r14 - process id
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// $r13 - message
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// $r12 - message data 0
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// $r11 - message data 1
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// $r0 - zero
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send:
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call(find)
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bra $p1 #send_proc
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ret
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// process single message for a given process
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//
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// $r15 - current
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// $r14 - process
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// $r0 - zero
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recv:
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push $r9
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push $r8
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ld b32 $r8 D[$r14 + #proc_qget]
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ld b32 $r9 D[$r14 + #proc_qput]
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bclr $flags $p1
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cmp b32 $r8 $r9
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bra e #recv_done
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// dequeue message
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and $r9 $r8 #proc_qmaskp
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add b32 $r8 1
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and $r8 #proc_qmaskf
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st b32 D[$r14 + #proc_qget] $r8
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ld b32 $r10 D[$r14 + #proc_recv]
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push $r15
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mov $r15 $flags
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push $r15
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mov b32 $r15 $r14
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shl b32 $r9 $r9 #proc_qlen
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add b32 $r14 $r9
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add b32 $r14 #proc_queue
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ld b32 $r11 D[$r14 + #msg_data1]
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ld b32 $r12 D[$r14 + #msg_data0]
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ld b32 $r13 D[$r14 + #msg_message]
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ld b32 $r14 D[$r14 + #msg_process]
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// process it
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call $r10
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pop $r15
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mov $flags $r15
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bset $flags $p1
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pop $r15
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recv_done:
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pop $r8
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pop $r9
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ret
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init:
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// setup stack
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nv_iord($r1, NV_PPWR_CAPS)
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extr $r1 $r1 9:17
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shl b32 $r1 8
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mov $sp $r1
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#ifdef NVKM_FALCON_MMIO_UAS
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// somehow allows the magic "access mmio via D[]" stuff that's
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// used by the nv_rd32/nv_wr32 macros to work
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imm32($r1, 0x10 | NV_PPWR_UAS_CONFIG_ENABLE)
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nv_iowrs(NV_PPWR_UAS_CONFIG, $r1)
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#endif
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// route all interrupts except user0/1 and pause to fuc
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imm32($r1, 0xe0)
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nv_iowr(NV_PPWR_INTR_ROUTE, $r1)
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// enable watchdog and subintr intrs
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mov $r1 NV_PPWR_INTR_EN_CLR_MASK
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nv_iowr(NV_PPWR_INTR_EN_CLR, $r1)
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mov $r1 NV_PPWR_INTR_EN_SET_WATCHDOG
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or $r1 NV_PPWR_INTR_EN_SET_SUBINTR
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nv_iowr(NV_PPWR_INTR_EN_SET, $r1)
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// enable interrupts globally
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imm32($r1, #intr)
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and $r1 0xffff
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mov $iv0 $r1
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bset $flags ie0
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// enable watchdog timer
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mov $r1 1
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nv_iowr(NV_PPWR_WATCHDOG_ENABLE, $r1)
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// bootstrap processes, idle process will be last, and not return
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mov $r15 #proc_list_head
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init_proc:
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ld b32 $r1 D[$r15 + #proc_init]
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cmp b32 $r1 0
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bra z #init_proc
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call $r1
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add b32 $r15 #proc_size
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bra #init_proc
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#endif
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