/*
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* Copyright (c) 2018 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _SNOC_H_
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#define _SNOC_H_
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#include "hw.h"
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#include "ce.h"
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struct ath10k_snoc_drv_priv {
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enum ath10k_hw_rev hw_rev;
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u64 dma_mask;
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};
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struct snoc_state {
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u32 pipe_cfg_addr;
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u32 svc_to_pipe_map;
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};
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struct ath10k_snoc_pipe {
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struct ath10k_ce_pipe *ce_hdl;
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u8 pipe_num;
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struct ath10k *hif_ce_state;
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size_t buf_sz;
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/* protect ce info */
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spinlock_t pipe_lock;
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struct ath10k_snoc *ar_snoc;
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};
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struct ath10k_snoc_target_info {
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u32 target_version;
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u32 target_type;
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u32 target_revision;
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u32 soc_version;
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};
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struct ath10k_snoc_ce_irq {
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u32 irq_line;
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};
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struct ath10k_wcn3990_vreg_info {
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struct regulator *reg;
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const char *name;
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u32 min_v;
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u32 max_v;
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u32 load_ua;
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unsigned long settle_delay;
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bool required;
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};
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struct ath10k_wcn3990_clk_info {
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struct clk *handle;
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const char *name;
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u32 freq;
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bool required;
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};
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struct ath10k_snoc {
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struct platform_device *dev;
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struct ath10k *ar;
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void __iomem *mem;
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dma_addr_t mem_pa;
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struct ath10k_snoc_target_info target_info;
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size_t mem_len;
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struct ath10k_snoc_pipe pipe_info[CE_COUNT_MAX];
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struct ath10k_snoc_ce_irq ce_irqs[CE_COUNT_MAX];
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struct ath10k_ce ce;
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struct timer_list rx_post_retry;
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struct ath10k_wcn3990_vreg_info *vreg;
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struct ath10k_wcn3990_clk_info *clk;
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};
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static inline struct ath10k_snoc *ath10k_snoc_priv(struct ath10k *ar)
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{
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return (struct ath10k_snoc *)ar->drv_priv;
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}
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void ath10k_snoc_write32(struct ath10k *ar, u32 offset, u32 value);
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u32 ath10k_snoc_read32(struct ath10k *ar, u32 offset);
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#endif /* _SNOC_H_ */
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