// SPDX-License-Identifier: GPL-2.0
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/* Copyright (C) 2021 Rockchip Electronics Co., Ltd */
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#include "icm40605.h"
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#include <linux/math64.h>
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/**
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* icm40605_set_enable() - enable chip functions.
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* @indio_dev: Device driver instance.
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* @enable: enable/disable
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*/
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int icm40605_set_enable(struct iio_dev *indio_dev, bool enable)
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{
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int ret;
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struct icm40605_data *data = iio_priv(indio_dev);
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ret = regmap_write(data->regmap, MPUREG_REG_BANK_SEL, ICM40605_BANK0);
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if (ret) {
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dev_err(regmap_get_device(data->regmap),
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"sel_bank0 fail: %d\n",
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ret);
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goto error_off;
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}
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if (enable) {
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ret = icm40605_set_mode(data, ICM40605_ACCEL, true);
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if (ret)
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goto error_off;
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ret = icm40605_set_mode(data, ICM40605_GYRO, true);
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if (ret)
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goto error_accl_off;
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ret = icm40605_reset_fifo(indio_dev);
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if (ret)
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goto error_gyro_off;
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data->standard_period = data->period_divider > 0 ?
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div_s64(NSEC_PER_MSEC, data->period_divider) :
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NSEC_PER_MSEC * data->period_divider * (-1);
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data->interrupt_period = data->standard_period;
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data->period_min = div_s64((data->standard_period * (100 -
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INV_MPU6050_TS_PERIOD_JITTER)),
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100);
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data->period_max = div_s64((data->standard_period * (100 +
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INV_MPU6050_TS_PERIOD_JITTER)),
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100);
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} else {
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ret = regmap_write(data->regmap, MPUREG_FIFO_CONFIG_REG, BIT_FIFO_MODE_CTRL_BYPASS);
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if (ret) {
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dev_err(regmap_get_device(data->regmap), "set MPUREG_FIFO_CONFIG_REG fail: %d\n",
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ret);
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goto error_gyro_off;
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}
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ret = icm40605_set_mode(data, ICM40605_GYRO, false);
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if (ret)
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goto error_gyro_off;
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ret = icm40605_set_mode(data, ICM40605_ACCEL, false);
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if (ret)
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goto error_accl_off;
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}
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dev_info(regmap_get_device(data->regmap), "set fifo mode end\n");
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return ret;
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error_gyro_off:
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icm40605_set_mode(data, ICM40605_GYRO, false);
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error_accl_off:
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icm40605_set_mode(data, ICM40605_ACCEL, false);
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error_off:
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return ret;
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}
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/**
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* inv_mpu_data_rdy_trigger_set_state() - set data ready interrupt state
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* @trig: Trigger instance
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* @state: Desired trigger state
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*/
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static int inv_mpu_data_rdy_trigger_set_state(struct iio_trigger *trig,
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bool state)
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{
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struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
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struct icm40605_data *data = iio_priv(indio_dev);
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int result;
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mutex_lock(&data->lock);
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dev_info(regmap_get_device(data->regmap), "in data_rdy_trigger_set_state, %d\n", state);
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result = icm40605_set_enable(indio_dev, state);
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mutex_unlock(&data->lock);
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return result;
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}
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static const struct iio_trigger_ops inv_mpu_trigger_ops = {
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.set_trigger_state = &inv_mpu_data_rdy_trigger_set_state,
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};
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int icm40605_probe_trigger(struct iio_dev *indio_dev, int irq_type)
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{
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int ret;
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struct icm40605_data *data = iio_priv(indio_dev);
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data->trig = devm_iio_trigger_alloc(&indio_dev->dev,
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"%s-dev%d",
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indio_dev->name,
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indio_dev->id);
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if (!data->trig)
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return -ENOMEM;
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ret = devm_request_irq(&indio_dev->dev, data->irq,
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&iio_trigger_generic_data_rdy_poll,
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irq_type,
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"inv_mpu",
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data->trig);
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if (ret)
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return ret;
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data->trig->dev.parent = regmap_get_device(data->regmap);
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data->trig->ops = &inv_mpu_trigger_ops;
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iio_trigger_set_drvdata(data->trig, indio_dev);
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ret = devm_iio_trigger_register(&indio_dev->dev, data->trig);
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if (ret)
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return ret;
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indio_dev->trig = iio_trigger_get(data->trig);
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return 0;
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}
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